Inventor · disambiguated record
Sanghamitra Roy
Also filed as: ROY SANGHAMITRA
11 granted patents·1 pending application·16 citations·filing 2011–2016
81Inventor score
Top patents by PatentIndex Score
12 records- 0185US9344358B2Aging-aware routing for NoCsUNIV UTAH STATE·Filed 2013·Granted May 17, 2016·13 cites·18 claims
- 0255US9063667B2Dynamic memory relocationANCAJAS DEAN MICHAEL·Filed 2013·Granted Jun 23, 2015·1 cites·17 claims
- 0354US8874941B2Apparatus and method for designing an architecturally homogeneous power-performance heterogeneous multicore processor using simulated annealing optimizationCHAKRABORTY KOUSHIK·Filed 2012·Granted Oct 28, 2014·1 cites·15 claims
- 0450US9213577B2Sustainable differentially reliable architecture for dark siliconALLRED JASON M·Filed 2013·Granted Dec 15, 2015·1 cites·20 claims
- 0546US9727342B2Error resilient pipelineCHAKRABORTY KOUSHIK·Filed 2014·Granted Aug 8, 2017·0 cites·20 claims
- 0646US9058070B2Predicting timing violationsUNIV UTAH STATE·Filed 2012·Granted Jun 16, 2015·0 cites·14 claims
- 0738US9396302B2Global router using graphics processing unitHAN YIDING·Filed 2014·Granted Jul 19, 2016·0 cites·17 claims
- 0836US9652611B2Mitigating a compromised network on chipANCAJAS DEAN MICHAEL·Filed 2015·Granted May 16, 2017·0 cites·12 claims
- 0935US10193827B2Hot carrier injection tolerant network on chip router architectureANCAJAS DEAN MICHAEL·Filed 2016·Granted Jan 29, 2019·0 cites·20 claims
- 1035US2015049758A1Hot carrier injection tolerant network on chip router architectureANCAJAS DEAN MICHAEL·Filed 2013·Application pending·0 cites
- 1131US8549456B2System and method for circuit design floorplanningROY SANGHAMITRA·Filed 2011·Granted Oct 1, 2013·0 cites·19 claims
- 1222US10057281B2Runtime detection of a bandwidth denial attack from a rogue interconnectShridevi Rajesh Jayashankara·Filed 2016·Granted Aug 21, 2018·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →