Inventor · disambiguated record
Sadegh Yazdanshenas
Also filed as: YAZDANSHENAS SADEGH
2 granted patents·1 pending application·2 citations·filing 2019–2023
37Inventor score
Files withINTEL CORP3
Top patents by PatentIndex Score
3 records- 0174US11768661B2Efficient logic blocks architectures for dense mapping of multipliersINTEL CORP·Filed 2019·Granted Sep 26, 2023·2 cites·20 claims
- 0263US2024028295A1Efficient logic blocks architectures for dense mapping of multipliersINTEL CORP·Filed 2023·Application pending·0 cites
- 0352US12431903B2Freeze and clear logic circuits and methods for integrated circuitsINTEL CORP·Filed 2022·Granted Sep 30, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →