Inventor · disambiguated record
Scot Kellar
Also filed as: KELLAR SCOT · KELLAR SCOT A
15 granted patents·5 pending applications·3,348 citations·filing 2001–2025
96Inventor score
Top patents by PatentIndex Score
20 records- 0199US7157787B2Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devicesINTEL CORP·Filed 2004·Granted Jan 2, 2007·867 cites·29 claims
- 0299US7037804B2Wafer bonding using a flexible bladder press for three dimensional (3D) vertical stack integrationINTEL CORP·Filed 2003·Granted May 2, 2006·258 cites·7 claims
- 0399US6887769B2Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the sameINTEL CORP·Filed 2002·Granted May 3, 2005·516 cites·5 claims
- 0499US6762076B2Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devicesINTEL CORP·Filed 2002·Granted Jul 13, 2004·579 cites·9 claims
- 0599US6661085B2Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stackINTEL CORP·Filed 2002·Granted Dec 9, 2003·536 cites·14 claims
- 0698US7056807B2Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stackINTEL CORP·Filed 2003·Granted Jun 6, 2006·245 cites·19 claims
- 0798US6975016B2Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereofINTEL CORP·Filed 2002·Granted Dec 13, 2005·252 cites·13 claims
- 0889US7265406B2Capacitor with conducting nanostructureINTEL CORP·Filed 2005·Granted Sep 4, 2007·12 cites·18 claims
- 0988US7091084B2Ultra-high capacitance device based on nanostructuresINTEL CORP·Filed 2005·Granted Aug 15, 2006·11 cites·6 claims
- 1088US6911373B2Ultra-high capacitance device based on nanostructuresINTEL CORP·Filed 2002·Granted Jun 28, 2005·32 cites·5 claims
- 1180US6599808B2Method and device for on-chip decoupling capacitor using nanostructures as bottom electrodeINTEL CORP·Filed 2001·Granted Jul 29, 2003·24 cites·21 claims
- 1268US2025231601A1Thermal management in horizontally or vertically stacked diesINTEL CORP·Filed 2025·Application pending·0 cites
- 1364US12242315B2Thermal management in horizontally or vertically stacked diesINTEL CORP·Filed 2021·Granted Mar 4, 2025·0 cites·30 claims
- 1464US7271434B2Capacitor with insulating nanostructureINTEL CORP·Filed 2003·Granted Sep 18, 2007·7 cites·4 claims
- 1563US7244983B2Method and device for on-chip decoupling capacitor using nanostructures as bottom electrodeINTEL CORP·Filed 2003·Granted Jul 17, 2007·9 cites·14 claims
- 1658US2025309638A1Processing systems and methods with adjustable voltage limitsINTEL CORP·Filed 2024·Application pending·0 cites
- 1753US2024329722A1Apparatus and method to control temperature ramp rates including temperature spike detection and controlINTEL CORP·Filed 2023·Application pending·0 cites
- 1851US2024063091A1Thermally enhanced structural member and/or bond layer for multichip composite devicesINTEL CORP·Filed 2022·Application pending·0 cites
- 1950US2007111386A1Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devicesKIM SARAH E·Filed 2006·Application pending·0 cites
- 2039US10068866B2Integrated circuit package having rectangular aspect ratioINTEL CORP·Filed 2016·Granted Sep 4, 2018·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →