Inventor · disambiguated record
Senani Gunaratna
Also filed as: GUNARATNA SENANI
12 granted patents·1 pending application·52 citations·filing 2001–2018
87Inventor score
Top patents by PatentIndex Score
13 records- 0188US10079054B1Selective power gating of routing resource configuration memory bits for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2017·Granted Sep 18, 2018·10 cites·20 claims
- 0288US6542096B2Serializer/deserializer embedded in a programmable deviceQUICKLOGIC CORP·Filed 2001·Granted Apr 1, 2003·34 cites·14 claims
- 0377US9735761B2Flexible ripple mode device implementation for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2015·Granted Aug 15, 2017·2 cites·18 claims
- 0477US9716491B2Multiple mode device implementation for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2015·Granted Jul 25, 2017·2 cites·18 claims
- 0562US7443222B1Dynamic clock controlQUICKLOGIC CORP·Filed 2007·Granted Oct 28, 2008·3 cites·20 claims
- 0660US10382021B2Flexible ripple mode device implementation for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2017·Granted Aug 13, 2019·0 cites·20 claims
- 0758US10630269B2Multiple mode device implementation for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2018·Granted Apr 21, 2020·0 cites·20 claims
- 0855US10141917B2Multiple mode device implementation for programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2017·Granted Nov 27, 2018·0 cites·20 claims
- 0951US9252755B1Shared logic for multiple registers with asynchronous initializationLATTICE SEMICONDUCTOR CORP·Filed 2015·Granted Feb 2, 2016·0 cites·20 claims
- 1049US8018248B2Adjustable interface buffer circuit between a programmable logic device and a dedicated deviceQUICKLOGIC CORP·Filed 2006·Granted Sep 13, 2011·1 cites·18 claims
- 1141US9543950B2High speed complementary NMOS LUT logicLATTICE SEMICONDUCTOR CORP·Filed 2015·Granted Jan 10, 2017·0 cites·18 claims
- 1237US8487652B2Adjustable interface buffer circuit between a programmable logic device and a dedicated deviceYAP KET-CHONG·Filed 2011·Granted Jul 16, 2013·0 cites·7 claims
- 1337US2011074464A1Low power programmable logic devicesGUNARATNA SENANI·Filed 2009·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →