Inventor · disambiguated record
Seong-Gwon Jang
Also filed as: JANG SEONG-GWON
1 granted patent·1 pending application·0 citations·filing 2018–2019
7Inventor score
Files withSAMSUNG ELECTRONICS CO LTD2
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2 records- 0137US2020150711A1Method of generating clock output to semiconductor device for testing semiconductor device, and clock converter and test system performing the methodSAMSUNG ELECTRONICS CO LTD·Filed 2019·Application pending·0 cites
- 0227US10847240B2Memory device with test circuit which generates asychronous signal based on delay and controls peripheral circuit based on asynchronous signal, operating method of memory device, and operating method of test system including memory deviceSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Nov 24, 2020·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →