Inventor · disambiguated record
Sean P. Kilcoyne
Also filed as: KILCOYNE SEAN P
25 granted patents·5 pending applications·64 citations·filing 1998–2025
92Inventor score
Top patents by PatentIndex Score
30 records- 0180US10847569B2Wafer level shim processingRAYTHEON CO·Filed 2019·Granted Nov 24, 2020·3 cites·13 claims
- 0279US10847419B2Stress compensation and relief in bonded wafersRAYTHEON CO·Filed 2018·Granted Nov 24, 2020·4 cites·15 claims
- 0379US6151430APhotonic device having an integal guide and method of manufacturingGORE ENTERPRISE HOLDINGS INC·Filed 1998·Granted Nov 21, 2000·46 cites·28 claims
- 0477US9100545B2Image device having a plurality of detectors in a time delay and integration (TDI) configuration and associated methodVAMPOLA JOHN L·Filed 2010·Granted Aug 4, 2015·4 cites·19 claims
- 0575US10515837B2Method of wafer bonding of dissimilar thickness dieRAYTHEON CO·Filed 2018·Granted Dec 24, 2019·2 cites·14 claims
- 0673US12349475B2Integrated circuit having vertical routing to bond padsRAYTHEON CO·Filed 2023·Granted Jul 1, 2025·0 cites·20 claims
- 0773US12051712B2Close butted collocated variable technology imaging arrays on a single ROICRAYTHEON CO·Filed 2023·Granted Jul 30, 2024·0 cites·12 claims
- 0867US12148721B2Iterative formation of damascene interconnectsRAYTHEON CO·Filed 2022·Granted Nov 19, 2024·0 cites·5 claims
- 0964US12261186B2Mosaic focal plane arrayRAYTHEON CO·Filed 2021·Granted Mar 25, 2025·0 cites·21 claims
- 1064US11705471B2Close butted collocated variable technology imaging arrays on a single ROICRAYTHEON CO·Filed 2020·Granted Jul 18, 2023·0 cites·12 claims
- 1163US11837623B2Integrated circuit having vertical routing to bond padsRAYTHEON CO·Filed 2020·Granted Dec 5, 2023·0 cites·8 claims
- 1263US2025151444A1Mosaic focal plane arrayRAYTHEON CO·Filed 2025·Application pending·0 cites
- 1362US11393869B2Wafer level shim processingRAYTHEON CO·Filed 2020·Granted Jul 19, 2022·0 cites·18 claims
- 1461US12278255B2Thin film obscurant for microelectronicsRAYTHEON CO·Filed 2021·Granted Apr 15, 2025·0 cites·20 claims
- 1560US11886095B2Scalable unit cell device for large two-dimensional arrays with integrated phase controlRAYTHEON CO·Filed 2022·Granted Jan 30, 2024·0 cites·20 claims
- 1660US11222813B2Method of manufacturing wafer level low melting temperature interconnectionsRAYTHEON CO·Filed 2019·Granted Jan 11, 2022·0 cites·17 claims
- 1759US11710756B2Integrating optical elements with electro-optical sensors via direct-bond hybridizationRAYTHEON CO·Filed 2020·Granted Jul 25, 2023·0 cites·19 claims
- 1859US11430753B2Iterative formation of damascene interconnectsRAYTHEON CO·Filed 2020·Granted Aug 30, 2022·0 cites·14 claims
- 1957US6472126B1Photonic device having an integral guide and method of manufacturingGORE ENTERPRISE HOLDINGS INC·Filed 2000·Granted Oct 29, 2002·5 cites·28 claims
- 2055US2024120242A1Process Control Monitor Device Structure for Buried TSV Formation in IC WafersRAYTHEON CO·Filed 2022·Application pending·0 cites
- 2154US10504777B2Method of manufacturing wafer level low melting temperature interconnectionsRAYTHEON CO·Filed 2018·Granted Dec 10, 2019·0 cites·17 claims
- 2253US10879291B2Stacked sensor with integrated capacitorsRAYTHEON CO·Filed 2018·Granted Dec 29, 2020·0 cites·19 claims
- 2351US8294232B2High quantum efficiency optical detectorsVAMPOLA JOHN L·Filed 2009·Granted Oct 23, 2012·0 cites·20 claims
- 2449US2019214319A1In-situ calibration structures and methods of use in semiconductor processingRAYTHEON CO·Filed 2019·Application pending·0 cites
- 2546US10672826B2Segmented channel stop grid for crosstalk mitigation in visible imaging arraysRAYTHEON CO·Filed 2018·Granted Jun 2, 2020·0 cites·13 claims
- 2645US10418406B2Hybrid sensor chip assembly and method for reducing radiative transfer between a detector and read-out integrated circuitRAYTHEON CO·Filed 2017·Granted Sep 17, 2019·0 cites·19 claims
- 2745US2022416095A1Low-stress dielectric layer, planarization method, and low-temperature processing for 3d-integrated electrical deviceRAYTHEON CO·Filed 2021·Application pending·0 cites
- 2844US11750945B2Imager with integrated asynchronous laser pulse detection having a signal component along a second electrical pathway passes through an ALPD readout integrated circuit to an imaging readout integrated circuitRAYTHEON CO·Filed 2020·Granted Sep 5, 2023·0 cites·12 claims
- 2944US10236226B2In-situ calibration structures and methods of use in semiconductor processingRAYTHEON CO·Filed 2016·Granted Mar 19, 2019·0 cites·17 claims
- 3039US2022115348A13d modified surface to enable improved bond strength and yield of electrical interconnectionsRAYTHEON CO·Filed 2020·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Sean P. Kilcoyne files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →