Inventor · disambiguated record
Seyed Arash Mirhaj
Also filed as: MIRHAJ SEYED ARASH
15 granted patents·5 pending applications·128 citations·filing 2014–2024
91Inventor score
Files withQUALCOMM INC20
Top patents by PatentIndex Score
20 records- 0198US11018687B1Power-efficient compute-in-memory analog-to-digital convertersQUALCOMM INC·Filed 2020·Granted May 25, 2021·15 cites·29 claims
- 0295US9455737B1Delta-sigma analog-to-digital converter (ADC) with time-interleaved (TI) or two-step successive approximation register (SAR) quantizerQUALCOMM INC·Filed 2016·Granted Sep 27, 2016·56 cites·30 claims
- 0394US10312927B1Calibration for time-interleaved analog-to-digital converters and signal generators thereforQUALCOMM INC·Filed 2018·Granted Jun 4, 2019·19 cites·21 claims
- 0492US11095301B1Flash-successive approximation register (SAR) hybrid analog-to-digital converter (ADC)QUALCOMM INC·Filed 2020·Granted Aug 17, 2021·4 cites·20 claims
- 0591US11538509B2Compute-in-memory with ternary activationQUALCOMM INC·Filed 2021·Granted Dec 27, 2022·3 cites·25 claims
- 0689US10680596B1Bootstrapped switch circuit with improved speedQUALCOMM INC·Filed 2019·Granted Jun 9, 2020·7 cites·12 claims
- 0789US9998138B1Time-multiplexed successive approximation register (SAR) analog-to-digital converter (ADC) circuits for multi-channel receiversQUALCOMM INC·Filed 2017·Granted Jun 12, 2018·10 cites·30 claims
- 0887US11657238B2Low-power compute-in-memory bitcellQUALCOMM INC·Filed 2020·Granted May 23, 2023·3 cites·20 claims
- 0987US10594308B1Digitally assisted control over comparator input common modeQUALCOMM INC·Filed 2018·Granted Mar 17, 2020·7 cites·19 claims
- 1080US11770129B2Pipelined analog-to-digital conversionQUALCOMM INC·Filed 2021·Granted Sep 26, 2023·1 cites·30 claims
- 1173US2025124354A1Sparsity-aware compute-in-memoryQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1264US12288142B2Sparsity-aware compute-in-memoryQUALCOMM INC·Filed 2021·Granted Apr 29, 2025·0 cites·28 claims
- 1364US9473165B2Reducing signal dependence for CDAC reference voltageQUALCOMM INC·Filed 2014·Granted Oct 18, 2016·3 cites·12 claims
- 1461US2025096810A1Analog-to-Digital Converter Non-Linearity Model Estimation Using Single-Bit Digital-to-Analog ConverterQUALCOMM INC·Filed 2023·Application pending·0 cites
- 1558US11569832B1Analog-to-digital conversionQUALCOMM INC·Filed 2021·Granted Jan 31, 2023·0 cites·67 claims
- 1657US12135956B2Analog adders for multi-bit MAC arrays in reconfigurable analog based neural networksQUALCOMM INC·Filed 2021·Granted Nov 5, 2024·0 cites·28 claims
- 1753US11631455B2Compute-in-memory bitcell with capacitively-coupled write operationQUALCOMM INC·Filed 2021·Granted Apr 18, 2023·0 cites·29 claims
- 1853US2023086802A1Eliminating memory bottlenecks for depthwise convolutionsQUALCOMM INC·Filed 2021·Application pending·0 cites
- 1949US2024256827A1Activation buffer architecture for data-reuse in a neural network acceleratorQUALCOMM INC·Filed 2021·Application pending·0 cites
- 2034US2019296755A1Circular histogram noise figure for noise estimation and adjustmentQUALCOMM INC·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →