Inventor · disambiguated record
Setti Shanmukheswara Rao
Also filed as: RAO SETTI S · RAO SETTI SHANMUKHESWARA
10 granted patents·3 pending applications·106 citations·filing 2006–2013
89Inventor score
Top patents by PatentIndex Score
13 records- 0186US8625333B2Memory device having memory cells with write assist functionalityRAO SETTI SHANMUKHESWARA·Filed 2011·Granted Jan 7, 2014·17 cites·20 claims
- 0285US8804406B2Conditional read-assist feature to accelerate access time in an electronic deviceRACHAMADUGU VINOD·Filed 2012·Granted Aug 12, 2014·13 cites·26 claims
- 0385US8730750B1Memory device with control circuitry for generating a reset signal in read and write modes of operationLSI CORP·Filed 2012·Granted May 20, 2014·11 cites·22 claims
- 0484US8724421B2Dual rail power supply scheme for memoriesEVANS DONALD A·Filed 2012·Granted May 13, 2014·11 cites·21 claims
- 0584US8441842B2Memory device having memory cells with enhanced low voltage write capabilityRACHAMADUGU VINOD·Filed 2010·Granted May 14, 2013·17 cites·20 claims
- 0682US8773924B2Read assist scheme for reducing read access time in a memoryLSI CORP·Filed 2012·Granted Jul 8, 2014·12 cites·22 claims
- 0777US7558145B2Word line control for improving read and write marginsINFINEON TECHNOLOGIES AG·Filed 2006·Granted Jul 7, 2009·14 cites·18 claims
- 0871US9384790B2Memory device with separately controlled sense amplifiersTRIVEDI MANISH·Filed 2012·Granted Jul 5, 2016·6 cites·21 claims
- 0958US8830771B2Memory device having control circuitry configured for clock-based write self-time trackingSHARAD SHAILENDRA·Filed 2012·Granted Sep 9, 2014·3 cites·20 claims
- 1055US8493764B2High density CAM array architectures with adaptive current controlled match-line dischargeRACHAMADUGU VINOD·Filed 2011·Granted Jul 23, 2013·2 cites·20 claims
- 1135US2015103604A1Memory array architectures having memory cells with shared write assist circuitryLSI CORP·Filed 2013·Application pending·0 cites
- 1234US2014112062A1Method and system for an adaptive negative-boost write assist circuit for memory architecturesLSI CORP·Filed 2012·Application pending·0 cites
- 1327US2013258794A1Memory device having control circuitry for sense amplifier reaction time trackingSHARAD SHAILENDRA·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →