Inventor · disambiguated record
Shuen-Chin Chang
Also filed as: CHANG SHUEN C · CHANG SHUEN-CHIN
18 granted patents·707 citations·filing 1984–2003
96Inventor score
Files withSUN MICROSYSTEMS INC7INTEGRATED MEMORY LOGIC INC6SAMSUNG SEMICONDUCTOR2SAMSUNG SEMICONDUCTOR INC2TEXAS INSTRUMENTS INC1
Top patents by PatentIndex Score
18 records- 0196US6477592B1System for I/O interfacing for semiconductor chip utilizing addition of reference element to each data element in first data stream and interpret to recover data elements of second data streamINTEGRATED MEMORY LOGIC INC·Filed 1999·Granted Nov 5, 2002·267 cites·26 claims
- 0293US5039875ACMOS power-on reset circuitSAMSUNG SEMICONDUCTOR·Filed 1989·Granted Aug 13, 1991·65 cites·9 claims
- 0386US7167527B1System and method for multi-symbol interfacingINTEGRATED MEMORY LOGIC INC·Filed 2002·Granted Jan 23, 2007·52 cites·50 claims
- 0483US7043657B1Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycleINTEGRATED MEMORY LOGIC INC·Filed 2003·Granted May 9, 2006·30 cites·5 claims
- 0580US5442748AArchitecture of output switching circuitry for frame bufferSUN MICROSYSTEMS INC·Filed 1993·Granted Aug 15, 1995·55 cites·20 claims
- 0679US6324602B1Advanced input/output interface for an integrated circuit device using two-level to multi-level signal conversionINTEGRATED MEMORY LOGIC INC·Filed 1998·Granted Nov 27, 2001·47 cites·25 claims
- 0770US6647506B1Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycleINTEGRATED MEMORY LOGIC INC·Filed 1999·Granted Nov 11, 2003·48 cites·29 claims
- 0869US6937664B1System and method for multi-symbol interfacingINTEGRATED MEMORY LOGIC INC·Filed 2000·Granted Aug 30, 2005·15 cites·17 claims
- 0961US5539430APipelined read write operations in a high speed frame buffer systemSUN MICROSYSTEMS INC·Filed 1993·Granted Jul 23, 1996·25 cites·16 claims
- 1057US4630240ADynamic memory with intermediate column derodeTEXAS INSTRUMENTS INC·Filed 1984·Granted Dec 16, 1986·12 cites·30 claims
- 1155US5528751AFrame buffer system designed for windowing operationsSUN MICROSYSTEMS INC·Filed 1995·Granted Jun 18, 1996·20 cites·20 claims
- 1252US4963771ATTL/CMOS level translatorSAMSUNG SEMICONDUCTOR·Filed 1989·Granted Oct 16, 1990·9 cites·11 claims
- 1350US5654742AMethod and apparatus for providing operations affecting a frame buffer without a row address strobe cycleSUN MICROSYSTEMS INC·Filed 1995·Granted Aug 5, 1997·13 cites·20 claims
- 1447US5805133AMethod and apparatus for increasing the rate of scrolling in a frame buffer system designed for windowing operationsSAMSUNG SEMICONDUCTOR INC·Filed 1996·Granted Sep 8, 1998·14 cites·18 claims
- 1547US5187386ALow standby current intermediate dc voltage generatorSAMSUNG SEMICONDUCTOR INC·Filed 1991·Granted Feb 16, 1993·12 cites·16 claims
- 1645US5504855AMethod and apparatus for providing fast multi-color storage in a frame bufferSUN MICROSYSTEMS INC·Filed 1993·Granted Apr 2, 1996·11 cites·19 claims
- 1741US5533187AMultiple block mode operations in a frame buffer system designed for windowing operationsSUN MICROSYSTEMS INC·Filed 1993·Granted Jul 2, 1996·8 cites·24 claims
- 1833US5500818AMethod and apparatus for providing accurate T(on) and T(off) times for the output of a memory arraySUN MICROSYSTEMS INC·Filed 1993·Granted Mar 19, 1996·4 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →