Inventor · disambiguated record
Shirish Gadre
Also filed as: GADRE SHIRISH · GADRE SHIRISH C
81 granted patents·13 pending applications·752 citations·filing 1997–2025
99Inventor score
Top patents by PatentIndex Score
94 records- 0192US11080051B2Techniques for efficiently transferring data to a processorNVIDIA CORP·Filed 2019·Granted Aug 3, 2021·9 cites·26 claims
- 0292US10699427B2Method and apparatus for obtaining sampled positions of texturing operationsNVIDIA CORP·Filed 2019·Granted Jun 30, 2020·9 cites·20 claims
- 0391US12141082B2Method and apparatus for efficient access to multidimensional data structures and/or other large data blocksNVIDIA CORP·Filed 2022·Granted Nov 12, 2024·4 cites·25 claims
- 0491US12020035B2Programmatically controlled data multicasting across multiple compute enginesNVIDIA CORP·Filed 2022·Granted Jun 25, 2024·3 cites·21 claims
- 0591US10424074B1Method and apparatus for obtaining sampled positions of texturing operationsNVIDIA CORP·Filed 2018·Granted Sep 24, 2019·7 cites·20 claims
- 0690US8424012B1Context switching on a video processor having a scalar execution unit and a vector execution unitKARANDIKAR ASHISH·Filed 2005·Granted Apr 16, 2013·15 cites·18 claims
- 0789US8738891B1Methods and systems for command acceleration in a video processor via translation of scalar instructions into vector instructionsKARANDIKAR ASHISH·Filed 2005·Granted May 27, 2014·22 cites·19 claims
- 0887US9471307B2System and processor that include an implementation of decoupled pipelinesNVIDIA CORP·Filed 2014·Granted Oct 18, 2016·10 cites·16 claims
- 0986US9348762B2Technique for accessing content-addressable memoryNVIDIA CORP·Filed 2012·Granted May 24, 2016·9 cites·19 claims
- 1084US12499052B2Method and apparatus for efficient access to multidimensional data structures and/or other large data blocksNVIDIA CORP·Filed 2022·Granted Dec 16, 2025·1 cites·16 claims
- 1184US6285715B1Methods and apparatus for error concealment while decoding a coded video bit streamSONY CORP·Filed 2000·Granted Sep 4, 2001·20 cites·18 claims
- 1283US9262174B2Dynamic bank mode addressing for memory accessFETTERMAN MICHAEL·Filed 2012·Granted Feb 16, 2016·8 cites·24 claims
- 1383US8997103B2N-way memory barrier operation coalescingGADRE SHIRISH·Filed 2012·Granted Mar 31, 2015·9 cites·18 claims
- 1482US6041400ADistributed extensible processing architecture for digital signal processing applicationsSONY CORP·Filed 1998·Granted Mar 21, 2000·105 cites·40 claims
- 1581US11803380B2High performance synchronization mechanisms for coordinating operations on a computer systemNVIDIA CORP·Filed 2019·Granted Oct 31, 2023·2 cites·22 claims
- 1681US8683184B1Multi context execution on a video processorLEW STEPHEN D·Filed 2005·Granted Mar 25, 2014·6 cites·21 claims
- 1780US10459861B2Unified cache for diverse memory trafficNVIDIA CORP·Filed 2017·Granted Oct 29, 2019·2 cites·21 claims
- 1879US10877757B2Binding constants at runtime for improved resource utilizationNVIDIA CORP·Filed 2018·Granted Dec 29, 2020·3 cites·20 claims
- 1979US9612836B2System, method, and computer program product for implementing software-based scoreboardingNVIDIA CORP·Filed 2014·Granted Apr 4, 2017·5 cites·19 claims
- 2078US11550584B1Implementing specialized instructions for accelerating Smith-Waterman sequence alignmentsNVIDIA CORP·Filed 2021·Granted Jan 10, 2023·1 cites·20 claims
- 2178US10095548B2Mechanism for waking common resource requests within a resource management subsystemFETTERMAN MICHAEL·Filed 2012·Granted Oct 9, 2018·5 cites·21 claims
- 2278US9111368B1Pipelined L2 cache for memory transfers for a video processorKARANDIKAR ASHISH·Filed 2005·Granted Aug 18, 2015·5 cites·23 claims
- 2378US6088047AMotion compensated digital video decoding with buffered picture storage memory mapSONY CORP·Filed 1997·Granted Jul 11, 2000·66 cites·20 claims
- 2478US6078616AMethods and apparatus for error concealment utilizing temporal domain motion vector estimationSONY CORP·Filed 1997·Granted Jun 20, 2000·44 cites·22 claims
- 2577US8736623B1Programmable DMA engine for implementing memory transfers and video processing for a video processorLEW STEPHEN D·Filed 2005·Granted May 27, 2014·4 cites·20 claims
- 2677US8687008B2Latency tolerant system for executing video processing operationsKARANDIKAR ASHISH·Filed 2005·Granted Apr 1, 2014·4 cites·19 claims
- 2777US6934338B1Variable length decoder for decoding digitally encoded video signalsSONY CORP·Filed 2003·Granted Aug 23, 2005·16 cites·11 claims
- 2877US2024378792A1Transcoding compressed texture sets to textures with a hardware-supported compression formatNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2977US2024378759A1Decompression of compressed texture setsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 3076US11379944B2Techniques for performing accelerated point sampling in a texture processing pipelineNVIDIA CORP·Filed 2020·Granted Jul 5, 2022·1 cites·20 claims
- 3176US9830224B2Selective fault stalling for a GPU memory pipeline in a unified virtual memory systemNVIDIA CORP·Filed 2013·Granted Nov 28, 2017·4 cites·19 claims
- 3276US8416251B2Stream processing in a video processorGADRE SHIRISH·Filed 2005·Granted Apr 9, 2013·4 cites·20 claims
- 3375US8493396B2Multidimensional datapath processing in a video processorKARANDIKAR ASHISH·Filed 2005·Granted Jul 23, 2013·3 cites·25 claims
- 3474US11768686B2Out of order memory request tracking structure and techniqueNVIDIA CORP·Filed 2020·Granted Sep 26, 2023·1 cites·36 claims
- 3572US6175597B1Methods and apparatus for error concealmentSONY CORP·Filed 2000·Granted Jan 16, 2001·8 cites·2 claims
- 3672US2025272107A1Cooperative Group ArraysNVIDIA CORP·Filed 2025·Application pending·0 cites
- 3771US9448837B2Cooperative thread array granularity context switch during trap handlingNVIDIA CORP·Filed 2013·Granted Sep 20, 2016·2 cites·21 claims
- 3870US9665969B1Data path and instruction set for packed pixel operations for video processingGADRE SHIRISH·Filed 2010·Granted May 30, 2017·3 cites·20 claims
- 3969US11604649B2Techniques for efficiently transferring data to a processorNVIDIA CORP·Filed 2021·Granted Mar 14, 2023·0 cites·11 claims
- 4069US7099569B2Method and apparatus for efficiently allocating memory when switching between DVD audio and DVD videoSONY ELECTRONICS INC·Filed 2002·Granted Aug 29, 2006·8 cites·19 claims
- 4169US6922770B2Memory controller providing dynamic arbitration of memory commandsSONY ELECTRONICS INC·Filed 2003·Granted Jul 26, 2005·15 cites·24 claims
- 4269US6215822B1Motion compensated digital video decoding and buffer memory addressing thereforSONY CORP·Filed 1997·Granted Apr 10, 2001·42 cites·5 claims
- 4368US6308253B1RISC CPU instructions particularly suited for decoding digital signal processing applicationsSONY CORP·Filed 1999·Granted Oct 23, 2001·56 cites·14 claims
- 4467US11367160B2Simultaneous compute and graphics schedulingNVIDIA CORP·Filed 2018·Granted Jun 21, 2022·1 cites·26 claims
- 4566US12333311B2Cooperative group arraysNVIDIA CORP·Filed 2022·Granted Jun 17, 2025·0 cites·20 claims
- 4666US12248788B2Distributed shared memoryNVIDIA CORP·Filed 2022·Granted Mar 11, 2025·0 cites·24 claims
- 4766US11347668B2Unified cache for diverse memory trafficNVIDIA CORP·Filed 2020·Granted May 31, 2022·0 cites·20 claims
- 4866US9678897B2Approach for context switching of lock-bit protected memoryNVIDIA CORP·Filed 2012·Granted Jun 13, 2017·2 cites·20 claims
- 4965US2025173152A1Distributed Shared MemoryNVIDIA CORP·Filed 2025·Application pending·0 cites
- 5064US8698817B2Video processor having scalar and vector componentsGADRE SHIRISH·Filed 2005·Granted Apr 15, 2014·1 cites·21 claims
Showing the top 50 of 94 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →