Inventor · disambiguated record
Shiva P. Gowni
Also filed as: GOWNI SHIVA · GOWNI SHIVA P
11 granted patents·223 citations·filing 1989–2000
91Inventor score
Top patents by PatentIndex Score
11 records- 0190US4963769ACircuit for selective power-down of unused circuitryCYPRESS SEMICONDUCTOR·Filed 1989·Granted Oct 16, 1990·85 cites·18 claims
- 0276US5777944ACircuit and method for instruction controllable slewrate of bit line driverCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jul 7, 1998·33 cites·12 claims
- 0363US6005821ACircuit and method for instruction controllable slew rate of bit line driverCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Dec 21, 1999·15 cites·6 claims
- 0462US6295627B1Method and apparatus for the automated design of memory devicesCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Sep 25, 2001·49 cites·4 claims
- 0553US6553549B1Static timing analysis with simulations on critical path netlists generated by static timing analysis toolsCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Apr 22, 2003·4 cites·20 claims
- 0644US5952868AVoltage level interface circuit with set-up and hold controlCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Sep 14, 1999·11 cites·16 claims
- 0742US5572715AArchitecture and circuits for eliminating skews in PLDsCYPRESS SEMICONDUCTOR CORP·Filed 1993·Granted Nov 5, 1996·7 cites·13 claims
- 0839US5600261AOutput enable access for an output bufferCYPRESS SEMICONDUCTOR CORP·Filed 1994·Granted Feb 4, 1997·5 cites·13 claims
- 0939US5534806APull-down access for an output bufferCYPRESS SEMICONDUCTOR CORP·Filed 1994·Granted Jul 9, 1996·5 cites·12 claims
- 1036US6357035B1Method and apparatus for the automated generation of programmable interconnect matricesCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Mar 12, 2002·9 cites·8 claims
- 1129US5963487AWrite enabling circuitry for a semiconductor memoryCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Oct 5, 1999·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →