Inventor · disambiguated record
Shigenori Ichinose
Also filed as: ICHINOSE SHIGENORI
13 granted patents·1 pending application·163 citations·filing 1990–2024
92Inventor score
Top patents by PatentIndex Score
14 records- 0181US6664638B2Semiconductor integrated circuit having reduced cross-talk noiseFUJITSU LTD·Filed 2001·Granted Dec 16, 2003·22 cites·6 claims
- 0280US7361975B2Semiconductor integrated circuit having reduced cross-talk noiseFUJITSU LTD·Filed 2004·Granted Apr 22, 2008·21 cites·1 claims
- 0370US5124776ABipolar integrated circuit having a unit block structureFUJITSU LTD·Filed 1990·Granted Jun 23, 1992·36 cites·22 claims
- 0469US7219320B2Semiconductor integrated circuit timing analysis apparatus timing analysis method and timing analysis programFUJITSU LTD·Filed 2004·Granted May 15, 2007·15 cites·13 claims
- 0568US7930665B2Method and program for designing semiconductor integrated circuitFUJITSU SEMICONDUCTOR LTD·Filed 2007·Granted Apr 19, 2011·4 cites·11 claims
- 0663US5388055ASemiconductor integrated circuit having polycell structure and method of designing the sameFUJITSU LTD·Filed 1991·Granted Feb 7, 1995·39 cites·17 claims
- 0762US2024336280A1Control apparatusDENSO CORP·Filed 2024·Application pending·0 cites
- 0861US7913212B2Method for determining a length of shielding of a semiconductor integrated circuit wiringFUJITSU SEMICONDUCTOR LTD·Filed 2008·Granted Mar 22, 2011·1 cites·2 claims
- 0958US6467070B2Design support apparatus for semiconductor devicesFUJITSU LTD·Filed 2001·Granted Oct 15, 2002·9 cites·13 claims
- 1055US6968521B2Method, apparatus and program product for automatic placement and routing of integrated circuitFUJITSU LTD·Filed 2002·Granted Nov 22, 2005·6 cites·19 claims
- 1149US6972493B2Semiconductor integrated circuit having reduced cross-talk noiseFUJITSU LTD·Filed 2003·Granted Dec 6, 2005·2 cites·1 claims
- 1242US7339250B2Semiconductor integrated circuit having reduced cross-talk noiseFUJITSU LTD·Filed 2004·Granted Mar 4, 2008·0 cites·1 claims
- 1337US6013924ASemiconductor integrated circuit and method for making wiring layout of semiconductor integrated circuitFUJITSU LTD·Filed 1997·Granted Jan 11, 2000·8 cites·13 claims
- 1435US8584069B2Apparatus and method for design support using layout positions of first and second terminalsUSHIYAMA KENICHI·Filed 2010·Granted Nov 12, 2013·0 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →