Inventor · disambiguated record
Shih-Fan Kuan
Also filed as: KUAN SHIH F · KUAN SHIH-FAN
24 granted patents·10 pending applications·69 citations·filing 2003–2025
93Inventor score
Top patents by PatentIndex Score
34 records- 0197US9881924B2Semiconductor memory device having coplanar digit line contacts and storage node contacts in memory array and method for fabricating the sameMICRON TECHNOLOGY INC·Filed 2016·Granted Jan 30, 2018·17 cites·41 claims
- 0296US10566332B2Semiconductor devicesMICRON TECHNOLOGY INC·Filed 2018·Granted Feb 18, 2020·11 cites·20 claims
- 0392US10163909B2Methods for fabricating a semiconductor memory deviceMICRON TECHNOLOGY INC·Filed 2017·Granted Dec 25, 2018·6 cites·22 claims
- 0485US10903103B2Front opening unified podNANYA TECHNOLOGY CORP·Filed 2018·Granted Jan 26, 2021·4 cites·19 claims
- 0582US10381302B2Semiconductor package with embedded MIM capacitor, and method of fabricating thereofMICRON TECHNOLOGY INC·Filed 2017·Granted Aug 13, 2019·4 cites·14 claims
- 0680US2025261358A1Method of manufacturing semiconductor device including 3d memory structureNANYA TECHNOLOGY CORP·Filed 2025·Application pending·0 cites
- 0779US10825722B1Method of manufacturing a semiconductor structureNANYA TECHNOLOGY CORP·Filed 2019·Granted Nov 3, 2020·2 cites·10 claims
- 0875US10593637B2Multi-device packages and related microelectronic devicesMICRON TECHNOLOGY INC·Filed 2018·Granted Mar 17, 2020·1 cites·22 claims
- 0975US2024121940A1Method for manufacturing semiconductor device including 3d memory structureNANYA TECHNOLOGY CORP·Filed 2023·Application pending·0 cites
- 1072US9543270B1Multi-device package and manufacturing method thereofINOTERA MEMORIES INC·Filed 2015·Granted Jan 10, 2017·2 cites·20 claims
- 1172US2024121939A1Semiconductor device including 3d memory structureNANYA TECHNOLOGY CORP·Filed 2022·Application pending·0 cites
- 1270US11211351B2Apparatuses including redistribution layers and related microelectronic devicesMICRON TECHNOLOGY INC·Filed 2020·Granted Dec 28, 2021·0 cites·20 claims
- 1368US6960503B2Method for fabricating a trench capacitorNANYA TECHNOLOGY CORP·Filed 2003·Granted Nov 1, 2005·14 cites·11 claims
- 1465US2024237327A9Semiconductor device including memory structure and method for manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2023·Application pending·0 cites
- 1563US9455243B1Silicon interposer and fabrication method thereofINOTERA MEMORIES INC·Filed 2015·Granted Sep 27, 2016·1 cites·9 claims
- 1662US10679958B2Methods of manufacturing a multi-device packageMICRON TECHNOLOGY INC·Filed 2018·Granted Jun 9, 2020·0 cites·20 claims
- 1762US2024237326A9Semiconductor device including memory structureNANYA TECHNOLOGY CORP·Filed 2022·Application pending·0 cites
- 1858US8384191B2Stack capacitor structure and forming methodNANYA TECHNOLOGY CORP·Filed 2011·Granted Feb 26, 2013·1 cites·4 claims
- 1954US12431425B2Conductive structure and capacitor structure and method for manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2023·Granted Sep 30, 2025·0 cites·18 claims
- 2053US12021114B2Semiconductor structure with single side capacitorNANYA TECHNOLOGY CORP·Filed 2022·Granted Jun 25, 2024·0 cites·7 claims
- 2152US12051719B2Method for manufacturing semiconductor structure with single side capacitorNANYA TECHNOLOGY CORP·Filed 2022·Granted Jul 30, 2024·0 cites·15 claims
- 2252US10373922B2Methods of manufacturing a multi-device packageMICRON TECHNOLOGY INC·Filed 2015·Granted Aug 6, 2019·0 cites·9 claims
- 2348US6991978B2World line structure with single-sided partially recessed gate structureNANYA TECHNOLOGY CORP·Filed 2004·Granted Jan 31, 2006·3 cites·11 claims
- 2446US7358576B2Word line structure with single-sided partially recessed gate structureNANYA TECHNOLOGY CORP·Filed 2005·Granted Apr 15, 2008·0 cites·6 claims
- 2546US6933229B2Method of manufacturing semiconductor device featuring formation of conductive plugsNANYA TECHNOLOGY CORP·Filed 2003·Granted Aug 23, 2005·2 cites·12 claims
- 2644US7749856B2Method of fabricating storage node with supported structure of stacked capacitorNANYA TECHNOLOGY CORP·Filed 2008·Granted Jul 6, 2010·0 cites·17 claims
- 2744US2005275109A1Semiconductor device and fabricating method thereofKUAN SHIH-FAN·Filed 2005·Application pending·0 cites
- 2842US6972248B2Method of fabricating semiconductor deviceNANYA TECHNOLOGY CORP·Filed 2004·Granted Dec 6, 2005·1 cites·19 claims
- 2937US2005260847A1Method for forming contact windowYANG J H·Filed 2004·Application pending·0 cites
- 3036US2005003307A1Method for forming DRAM cell bit-line contactFiled 2003·Application pending·0 cites
- 3135US6943099B2Method for manufacturing gate structure with sides of its metal layer partially removedNANYA TECHNOLOGY CORP·Filed 2004·Granted Sep 13, 2005·0 cites·10 claims
- 3234US6930043B2Method for forming DRAM cell bit line and bit line contact structureNANYA TECHNOLOGY CORP·Filed 2003·Granted Aug 16, 2005·0 cites·2 claims
- 3334US2005176244A1Method for manufacturing gate structure of memoryNANYA TECHNOLOGY CORP·Filed 2004·Application pending·0 cites
- 3434US2016351462A1Fan-out wafer level package and fabrication method thereofINOTERA MEMORIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →