Inventor · disambiguated record
Shyh-Dar Lee
Also filed as: LEE SHYH-DAR
23 granted patents·19 pending applications·632 citations·filing 1996–2002
97Inventor score
Files withSILICON INTEGRATED SYS CORP20IND TECH RES INST3NAT SCIENCE COUNCIL1SILICON INTERGRATED SYSTEMS CO1
Top patents by PatentIndex Score
42 records- 0194US6696222B2Dual damascene process using metal hard maskSILICON INTEGRATED SYS CORP·Filed 2001·Granted Feb 24, 2004·101 cites·14 claims
- 0293US6486059B2Dual damascene process using an oxide liner for a dielectric barrier layerSILICON INTERGRATED SYSTEMS CO·Filed 2001·Granted Nov 26, 2002·74 cites·20 claims
- 0393US6472306B1Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymerIND TECH RES INST·Filed 2000·Granted Oct 29, 2002·96 cites·37 claims
- 0490US6521523B2Method for forming selective protection layers on copper interconnectsSILICON INTEGRATED SYS CORP·Filed 2001·Granted Feb 18, 2003·51 cites·31 claims
- 0584US6495448B1Dual damascene processSILICON INTEGRATED SYS CORP·Filed 2002·Granted Dec 17, 2002·38 cites·16 claims
- 0678US6492226B1Method for forming a metal capacitor in a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Dec 10, 2002·27 cites·12 claims
- 0777US6338999B1Method for forming metal capacitors with a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jan 15, 2002·21 cites·8 claims
- 0875US6483142B1Dual damascene structure having capacitorsSILICON INTEGRATED SYS CORP·Filed 2002·Granted Nov 19, 2002·22 cites·12 claims
- 0974US6391713B1Method for forming a dual damascene structure having capacitorsSILICON INTEGRATED SYS CORP·Filed 2001·Granted May 21, 2002·22 cites·12 claims
- 1070US6410386B1Method for forming a metal capacitor in a damascene processSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jun 25, 2002·20 cites·10 claims
- 1169US6503835B1Method of making an organic copper diffusion barrier layerSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jan 7, 2003·13 cites·8 claims
- 1268US6495877B1Metal capacitors with damascene structures and method for forming the sameSILICON INTEGRATED SYS CORP·Filed 2001·Granted Dec 17, 2002·13 cites·17 claims
- 1368US6376392B1PECVD process for ULSI ARLIND TECH RES INST·Filed 2001·Granted Apr 23, 2002·12 cites·21 claims
- 1468US6358792B1Method for fabricating metal capacitorSILICON INTEGRATED SYS CORP·Filed 2001·Granted Mar 19, 2002·15 cites·12 claims
- 1566US6649512B1Method for improving adhesion of a low k dielectric to a barrier layerSILICON INTEGRATED SYS CORP·Filed 2002·Granted Nov 18, 2003·13 cites·18 claims
- 1655US6603167B2Capacitor with lower electrode located at the same level as an interconnect lineSILICON INTEGRATED SYS CORP·Filed 2002·Granted Aug 5, 2003·6 cites·15 claims
- 1755US6548409B1Method of reducing micro-scratches during tungsten CMPSILICON INTEGRATED SYS CORP·Filed 2002·Granted Apr 15, 2003·7 cites·6 claims
- 1855US6512260B2Metal capacitor in damascene structuresSILICON INTEGRATED SYS CORP·Filed 2002·Granted Jan 28, 2003·8 cites·6 claims
- 1955US6504205B1Metal capacitors with damascene structuresSILICON INTEGRATED SYS CORP·Filed 2001·Granted Jan 7, 2003·6 cites·7 claims
- 2055US6005160AHeterobifunctional membrane in application of artificial corneaNAT SCIENCE COUNCIL·Filed 1996·Granted Dec 21, 1999·48 cites·13 claims
- 2149US6593225B1Method of forming a stacked dielectric layer on a semiconductor substrate having metal patternsSILICON INTEGRATED SYS CORP·Filed 2002·Granted Jul 15, 2003·3 cites·19 claims
- 2248US6242361B1Plasma treatment to improve DUV photoresist processIND TECH RES INST·Filed 1999·Granted Jun 5, 2001·14 cites·19 claims
- 2346US6514815B2Method for fabricating polysilicon capacitorSILICON INTEGRATED SYS CORP·Filed 2002·Granted Feb 4, 2003·2 cites·11 claims
- 2440US2003067077A1Organic copper diffusion barrier layerSILICON INTEGRATED SYS CORP·Filed 2002·Application pending·0 cites
- 2537US2003219961A1Method to reduce reflectivity of polysilicon layerFiled 2002·Application pending·0 cites
- 2637US2003124813A1Method of fabricating shallow trench isolationFiled 2002·Application pending·0 cites
- 2737US2003219996A1Method of forming a sealing layer on a copper patternFiled 2002·Application pending·0 cites
- 2837US2003044532A1Process for preparing porous low dielectric constant materialFiled 2002·Application pending·0 cites
- 2937US2004033703A1Method for forming amino-free low k materialFiled 2002·Application pending·0 cites
- 3037US2003141605A1Method of forming identifying mark on semiconductor waferSILICON INTEGRATED SYS CORP·Filed 2002·Application pending·0 cites
- 3137US2003170978A1Method of fabricating a dual damascene structure on a semiconductor substrateFiled 2002·Application pending·0 cites
- 3237US2003124795A1Method of forming a polysilicon to polysilicon capacitorFiled 2002·Application pending·0 cites
- 3337US2003124809A1Method of forming an oxide film with resistance to erosion caused by stripperFiled 2002·Application pending·0 cites
- 3436US2003119301A1Method of fabricating an IMD layer to improve global planarization in subsequent CMPFiled 2001·Application pending·0 cites
- 3536US2003143835A1Dual damascene process for improving planarization of an inter-metal dielectric layerFiled 2002·Application pending·0 cites
- 3636US2003116826A1Interconnect structure capped with a metallic barrier layer and method fabrication thereofFiled 2001·Application pending·0 cites
- 3736US2003008493A1Interconnect structure manufacturingFiled 2001·Application pending·0 cites
- 3835US2002182850A1Interconnect structure manufacturing processFiled 2001·Application pending·0 cites
- 3934US2002175145A1Method of forming void-free intermetal dielectricsFiled 2001·Application pending·0 cites
- 4034US2003008495A1Selective barrier metal fabricated for interconnect structure manufacturing processFiled 2001·Application pending·0 cites
- 4133US2003075807A1Interconnect structure with a cap layer on an IMD layer and a method of formation thereofFiled 2002·Application pending·0 cites
- 4226US2003129839A1Method of forming a liner in shallow trench isolationFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →