Inventor · disambiguated record
Sharon Levin
Also filed as: LEVIN SHARON
16 granted patents·2 pending applications·100 citations·filing 2005–2021
91Inventor score
Top patents by PatentIndex Score
18 records- 0192US7575977B2Self-aligned LDMOS fabrication method integrated deep-sub-micron VLSI process, using a self-aligned lithography etches and implant processTOWER SEMICONDUCTOR LTD·Filed 2007·Granted Aug 18, 2009·38 cites·20 claims
- 0290US9484454B2Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structureTOWER SEMICONDUCTOR LTD·Filed 2013·Granted Nov 1, 2016·11 cites·16 claims
- 0387US7544557B2Gate defined Schottky diodeTOWER SEMICONDUCTOR LTD·Filed 2005·Granted Jun 9, 2009·18 cites·6 claims
- 0485US9105712B1Double RESURF LDMOS with separately patterned P+ and N+ buried layers formed by shared maskTOWER SEMICONDUCTOR LTD·Filed 2014·Granted Aug 11, 2015·10 cites·21 claims
- 0582US8921173B2Deep silicon via as a drain sinker in integrated vertical DMOS transistorLEVIN SHARON·Filed 2012·Granted Dec 30, 2014·7 cites·6 claims
- 0680US9728632B2Deep silicon via as a drain sinker in integrated vertical DMOS transistorTOWER SEMICONDUCTOR LTD·Filed 2014·Granted Aug 8, 2017·3 cites·9 claims
- 0769US9806174B2Double-resurf LDMOS with drift and PSURF implants self-aligned to a stacked gate “bump” structureTOWER SEMICONDUCTOR LTD·Filed 2016·Granted Oct 31, 2017·1 cites·20 claims
- 0867US7485941B2Cobalt silicide schottky diode on isolated wellTOWER SEMICONDUCTOR LTD·Filed 2005·Granted Feb 3, 2009·4 cites·17 claims
- 0965US10217826B2Apparatus of a metal-oxide-semiconductor (MOS) transistor including a multi-split gateTOWER SEMICONDUCTOR LTD·Filed 2016·Granted Feb 26, 2019·1 cites·23 claims
- 1065US9812566B1LDMOS device having a low angle sloped oxideTOWER SEMICONDUCTOR LTD·Filed 2016·Granted Nov 7, 2017·1 cites·18 claims
- 1162US9330979B2LDMOS transistor having elevated field oxide bumps and method of making sameLEVIN SHARON·Filed 2008·Granted May 3, 2016·3 cites·17 claims
- 1260US7368760B2Low parasitic capacitance Schottky diodeTOWER SEMICONDUCTOR LTD·Filed 2005·Granted May 6, 2008·3 cites·15 claims
- 1347US2015279969A1Double-Resurf LDMOS With Drift And PSURF Implants Self-Aligned To A Stacked Gate "BUMP" StructureTOWER SEMICONDUCTOR LTD·Filed 2015·Application pending·0 cites
- 1446US9837411B2Semiconductor die with a metal viaTOWER SEMICONDUCTOR LTD·Filed 2015·Granted Dec 5, 2017·0 cites·19 claims
- 1543US2021320204A1Semiconductor device and method for producing sameTOWER PARTNERS SEMICONDUCTOR CO LTD·Filed 2021·Application pending·0 cites
- 1634US9640607B2Die including a high voltage capacitorTOWER SEMICONDUCTOR LTD·Filed 2015·Granted May 2, 2017·0 cites·6 claims
- 1733US9461039B2Die including a Schottky diodeTOWER SEMICONDUCTOR LTD·Filed 2015·Granted Oct 4, 2016·0 cites·18 claims
- 1829US10522388B1Method of forming high-voltage silicon-on-insulator device with diode connection to handle layerTOWER SEMICONDUCTOR LTD·Filed 2018·Granted Dec 31, 2019·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →