Inventor · disambiguated record

Shigeo Miya

Also filed as: MIYA SHIGEO

1 granted patent·1 pending application·4 citations·filing 2005–2006

25Inventor score

Technology areasG06F

Files withKYOYA MUNEAKI1 MATSUSHITA ELECTRIC INDUSTRIAL CO LTD1

Top patents by PatentIndex Score

2 records

0153US7409657B2Clock tree layout method for semiconductor integrated circuitMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2005·Granted Aug 5, 2008·4 cites·2 claims
0228US2007143727A1Method of designing layout of multipower integrated circuitKYOYA MUNEAKI·Filed 2006·Application pending·0 cites

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →