Inventor · disambiguated record
Shriram D. Moharil
Also filed as: MOHARIL SHRIRAM D
7 granted patents·4 citations·filing 2010–2013
74Inventor score
Top patents by PatentIndex Score
7 records- 0174US8880855B2Dual register data path architecture with registers in a data file divided into groups and sub-groupsANDERSON TIMOTHY D·Filed 2011·Granted Nov 4, 2014·1 cites·3 claims
- 0265US8554823B2Technique for optimization and re-use of hardware in the implementation of instructions used in viterbi and turbo decoding, using carry and save arithmeticANDERSON TIMOTHY D·Filed 2010·Granted Oct 8, 2013·3 cites·4 claims
- 0350US9189456B2Technique for optimization and re-use of hardware in the implementation of instructions used in Viterbi and turbo decoding, using carry save arithmeticANDERSON TIMOTHY D·Filed 2013·Granted Nov 17, 2015·0 cites·3 claims
- 0443US8601040B2Reduced-level shift overflow detectionANDERSON TIMOTHY D·Filed 2010·Granted Dec 3, 2013·0 cites·17 claims
- 0542US8805903B2Extended-width shifter for arithmetic logic unitANDERSON TIMOTHY D·Filed 2011·Granted Aug 12, 2014·0 cites·17 claims
- 0635US8650239B2Hardware implementation of a Galois field multiplierMOHARIL SHRIRAM D·Filed 2010·Granted Feb 11, 2014·0 cites·12 claims
- 0735US8554824B2Efficient technique for optimal re-use of hardware in the implementation of instructions used in viterbi, turbo and LPDC decodersMOHARIL SHRIRAM D·Filed 2010·Granted Oct 8, 2013·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →