Inventor · disambiguated record
Shuai Mu
Also filed as: Mu shuai
11 granted patents·7 pending applications·16 citations·filing 2013–2025
83Inventor score
Top patents by PatentIndex Score
18 records- 0192US10310943B2Distributed data object management systemMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted Jun 4, 2019·10 cites·20 claims
- 0291US12242846B2Supporting 8-bit floating point format operands in a computing architectureINTEL CORP·Filed 2024·Granted Mar 4, 2025·1 cites·20 claims
- 0383US11625244B2Native support for execution of get exponent, get mantissa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logicINTEL CORP·Filed 2021·Granted Apr 11, 2023·1 cites·25 claims
- 0479US12511121B2Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logicINTEL CORP·Filed 2024·Granted Dec 30, 2025·0 cites·20 claims
- 0576US11003532B2Distributed data object management system operationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2017·Granted May 11, 2021·4 cites·20 claims
- 0674US12067394B2Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logicINTEL CORP·Filed 2023·Granted Aug 20, 2024·0 cites·20 claims
- 0773US2025199858A1Multiple register allocation sizes for threadsINTEL CORP·Filed 2024·Application pending·0 cites
- 0872US2025321736A1Supporting 8-bit floating point format operands in a computing architectureINTEL CORP·Filed 2025·Application pending·0 cites
- 0964US12210905B2Multiple register allocation sizes for threadsINTEL CORP·Filed 2021·Granted Jan 28, 2025·0 cites·20 claims
- 1058US2025036361A1Floating-point conversion via an integer unitINTEL CORP·Filed 2023·Application pending·0 cites
- 1154US12333306B2High performance constant cache and constant access mechanismsINTEL CORP·Filed 2021·Granted Jun 17, 2025·0 cites·14 claims
- 1254US12164884B2Tanh and sigmoid function executionINTEL CORP·Filed 2020·Granted Dec 10, 2024·0 cites·15 claims
- 1353US2025085969A1Unblocking the integer pipeline during math pipeline phases in a graphics environmentINTEL CORP·Filed 2023·Application pending·0 cites
- 1451US2025036412A1Avoiding the use of a result crossbar when down converting to packed register formatsINTEL CORP·Filed 2023·Application pending·0 cites
- 1551US2025110741A1Supporting 8-bit floating point format for parallel computing and stochastic rounding operations in a graphics architectureINTEL CORP·Filed 2023·Application pending·0 cites
- 1649US11281534B2Distributed data object management systemMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2019·Granted Mar 22, 2022·0 cites·20 claims
- 1749US2024103810A1Supporting vector multiply add with double accumulator access in a graphics environmentINTEL CORP·Filed 2022·Application pending·0 cites
- 1846US9317448B2Methods and apparatus related to data processors and caches incorporated in data processorsADVANCED MICRO DEVICES INC·Filed 2013·Granted Apr 19, 2016·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →