Inventor · disambiguated record
Shyam Sunder Raghunathan
Also filed as: RAGHUNATHAN SHYAM SUNDER
14 granted patents·15 pending applications·48 citations·filing 2013–2025
89Inventor score
Top patents by PatentIndex Score
29 records- 0192US9396791B2Programming memories with multi-level pass signalMICRON TECHNOLOGY INC·Filed 2014·Granted Jul 19, 2016·12 cites·29 claims
- 0285US9418000B2Dynamically compensating for degradation of a non-volatile memory deviceINTEL CORP·Filed 2014·Granted Aug 16, 2016·9 cites·21 claims
- 0385US9099183B2Program VT spread folding for NAND flash memory programmingINTEL CORP·Filed 2013·Granted Aug 4, 2015·9 cites·21 claims
- 0483US9245645B2Multi-pulse programming for memoryINTEL CORP·Filed 2013·Granted Jan 26, 2016·8 cites·16 claims
- 0577US10043574B2Programming memories with multi-level pass signalMICRON TECHNOLOGY INC·Filed 2018·Granted Aug 7, 2018·3 cites·20 claims
- 0672US9535777B2Defect management policies for NAND flash memoryINTEL CORP·Filed 2013·Granted Jan 3, 2017·3 cites·20 claims
- 0771US9922704B2Programming memories with multi-level pass signalMICRON TECHNOLOGY INC·Filed 2016·Granted Mar 20, 2018·2 cites·20 claims
- 0870US2025104781A1Wordline or pillar state detection for faster read access timesMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 0966US12205653B2Wordline or pillar state detection for faster read access timesMICRON TECHNOLOGY INC·Filed 2022·Granted Jan 21, 2025·0 cites·20 claims
- 1064US2024379176A1Partial block erase operations in memory devicesMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1162US12087372B2Partial block erase operations in memory devicesMICRON TECHNOLOGY INC·Filed 2022·Granted Sep 10, 2024·0 cites·20 claims
- 1262US2025157549A1Transient and stable state read operations of a memory deviceMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1361US9418752B2Ramping inhibit voltage during memory programmingRAJWADE SHANTANU R·Filed 2014·Granted Aug 16, 2016·2 cites·20 claims
- 1461US2025364062A1Program suspend-resume operations in a memory deviceMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1558US12224016B2Transient and stable state read operations of a memory deviceMICRON TECHNOLOGY INC·Filed 2022·Granted Feb 11, 2025·0 cites·25 claims
- 1655US2025004789A1Resuming suspended program operations in a memory deviceMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1754US2025226034A1Programming multiple erase blocks coupled to a same stringMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1854US2025329403A1Enhancements to programming half-good and third-good blocks in three-dimensional memoryMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 1953US2025140323A1Logical block construction for physical blocks comprising multiple erase blocks coupled to a same stringMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2053US2025210116A1Memory configured to resume a suspended erase operation with a variable erase voltageMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2152US2025006275A1Sense voltage adjustment among multiple erase blocksMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2251US2025006269A1Managing allocation of blocks in a memory sub-systemMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2350US10658053B2Ramping inhibit voltage during memory programmingINTEL CORP·Filed 2017·Granted May 19, 2020·0 cites·17 claims
- 2449US2025140322A1Selectively erasing one of multiple erase blocks coupled to a same string by creating a pseudo pn junctionMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2548US9792997B2Ramping inhibit voltage during memory programmingINTEL CORP·Filed 2016·Granted Oct 17, 2017·0 cites·17 claims
- 2648US2024168878A1Disturb tracking among multiple erase blocks coupled to a same stringMICRON TECHNOLOGY INC·Filed 2023·Application pending·0 cites
- 2747US2025006292A1Stable state error-handling bin selection in memory devicesMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 2846US11762767B2Storing highly read data at low impact read disturb pages of a memory deviceMICRON TECHNOLOGY INC·Filed 2021·Granted Sep 19, 2023·0 cites·20 claims
- 2941US2024312529A1Corrective read with partial block offset in a memory deviceMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →