Inventor · disambiguated record
Shrinivas Sureban
Also filed as: SUREBAN SHRINIVAS
2 granted patents·1 pending application·1 citations·filing 2009–2012
30Inventor score
Technology areasG06F
Top patents by PatentIndex Score
3 records- 0148US8583844B2System and method for optimizing slave transaction ID width based on sparse connection in multilayer multilevel interconnect system-on-chip architecturePULLAGOUNDAPATTI SAKTHIVEL KOMARASAMY·Filed 2011·Granted Nov 12, 2013·1 cites·16 claims
- 0238US7984212B2System and method for utilizing first-in-first-out (FIFO) resources for handling differences in data rates between peripherals via a merge module that merges FIFO channelsLSI CORP·Filed 2009·Granted Jul 19, 2011·0 cites·18 claims
- 0327US2014006644A1Address Remapping Using Interconnect Routing Identification BitsPULLAGOUNDAPATTI SAKTHIVEL KOMARASAMY·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →