Inventor · disambiguated record
Shinichi Sutou
Also filed as: SUTOU SHINICHI
13 granted patents·3 pending applications·91 citations·filing 1997–2017
89Inventor score
Top patents by PatentIndex Score
16 records- 0194US8657270B2Cover member and suspensionTAKADA AKIRA·Filed 2011·Granted Feb 25, 2014·23 cites·6 claims
- 0278US10190686B2Cover memberSHOWA CORP·Filed 2016·Granted Jan 29, 2019·3 cites·10 claims
- 0377US5781560ASystem testing device and method using JTAG circuit for testing high-package density printed circuit boardsFUJITSU LTD·Filed 1997·Granted Jul 14, 1998·44 cites·13 claims
- 0475US10167919B2Cylinder device and cover memberKYB CORP·Filed 2015·Granted Jan 1, 2019·2 cites·18 claims
- 0568US9251117B2Reconfigurable circuit with suspension control circuitHANAI TAKASHI·Filed 2010·Granted Feb 2, 2016·3 cites·15 claims
- 0667US10203014B2Cover member and shock absorberSHOWA CORP·Filed 2015·Granted Feb 12, 2019·2 cites·15 claims
- 0766US9720879B2Reconfigurable circuit having rows of a matrix of registers connected to corresponding ports and a semiconductor integrated circuitSUTOU SHINICHI·Filed 2010·Granted Aug 1, 2017·4 cites·21 claims
- 0864US8291360B2Data conversion apparatus, method, and computer-readable recording medium storing program for generating circuit configuration information from circuit descriptionHIGUCHI HAYATO·Filed 2009·Granted Oct 16, 2012·5 cites·6 claims
- 0960US7996661B2Loop processing counter with automatic start time set or trigger modes in context reconfigurable PE arrayFUJITSU SEMICONDUCTOR LTD·Filed 2008·Granted Aug 9, 2011·2 cites·8 claims
- 1059US8171259B2Multi-cluster dynamic reconfigurable circuit for context valid processing of data by clearing received data with added context change indicative signalHANAI TAKASHI·Filed 2009·Granted May 1, 2012·2 cites·8 claims
- 1157US8451022B2Integrated circuit and input data controlling method for reconfigurable circuitKAWANO TETSUO·Filed 2007·Granted May 28, 2013·1 cites·14 claims
- 1248US8539415B2Reconfigurable circuit, its design method, and design apparatusSUTOU SHINICHI·Filed 2009·Granted Sep 17, 2013·0 cites·10 claims
- 1347US2009193239A1Counter control circuit, dynamic reconfigurable circuit, and loop processing control methodFUJITSU MICROELECTRONICS LTD·Filed 2008·Application pending·0 cites
- 1445US8359419B2System LSI having plural busesFUJITSU LTD·Filed 2009·Granted Jan 22, 2013·0 cites·15 claims
- 1535US2011246747A1Reconfigurable circuit using valid signals and method of operating reconfigurable circuitFUJITSU SEMICONDUCTOR LTD·Filed 2011·Application pending·0 cites
- 1634US2017276231A1Dust cover, steering device, and damperSHOWA CORP·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →