Inventor · disambiguated record
Shaun P. Whalen
Also filed as: WHALEN SHAUN P · WHALEN SHAUN PATRICK
15 granted patents·690 citations·filing 1996–2006
94Inventor score
Top patents by PatentIndex Score
15 records- 0189US5935266AMethod for powering-up a microprocessor under debugger controlLUCENT TECHNOLOGIES INC·Filed 1996·Granted Aug 10, 1999·91 cites·27 claims
- 0287US5724505AApparatus and method for real-time program monitoring via a serial interfaceLUCENT TECHNOLOGIES INC·Filed 1996·Granted Mar 3, 1998·147 cites·28 claims
- 0384US6243836B1Apparatus and method for circular buffering on an on-chip discontinuity traceLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jun 5, 2001·122 cites·8 claims
- 0480US6052766APointer register indirectly addressing a second register in the processor core of a digital processorLUCENT TECHNOLOGIES INC·Filed 1998·Granted Apr 18, 2000·103 cites·19 claims
- 0579US6415369B1Shared devices and memory using split bus and time slot interface bus arbitrationAGERE SYST GUARDIAN CORP·Filed 2000·Granted Jul 2, 2002·34 cites·17 claims
- 0674US7296259B2Processor system with cache-based software breakpointsAGERE SYSTEMS INC·Filed 2002·Granted Nov 13, 2007·22 cites·16 claims
- 0767US5889981AApparatus and method for decoding instructions marked with breakpoint codes to select breakpoint action from plurality of breakpoint actionsLUCENT TECHNOLOGIES INC·Filed 1996·Granted Mar 30, 1999·53 cites·32 claims
- 0865US7168067B2Multiprocessor system with cache-based software breakpointsAGERE SYSTEMS INC·Filed 2002·Granted Jan 23, 2007·12 cites·12 claims
- 0965US6269440B1Accelerating vector processing using plural sequencers to process multiple loop iterations simultaneouslyAGERE SYST GUARDIAN CORP·Filed 1999·Granted Jul 31, 2001·51 cites·46 claims
- 1064US7831979B2Processor with instruction-based interrupt handlingAGERE SYSTEMS INC·Filed 2004·Granted Nov 9, 2010·10 cites·22 claims
- 1155US6622153B1Virtual parallel multiplier-accumulatorAGERE SYSTEMS INC·Filed 1999·Granted Sep 16, 2003·25 cites·18 claims
- 1246US7080113B2Virtually parallel multiplier-accumulatorAGERE SYSTEMS INC·Filed 2003·Granted Jul 18, 2006·0 cites·17 claims
- 1341US5761492AMethod and apparatus for uniform and efficient handling of multiple precise events in a processor by including event commands in the instruction setLUCENT TECHNOLOGIES INC·Filed 1996·Granted Jun 2, 1998·14 cites·44 claims
- 1438US7675913B2Port addressing method and apparatus for link layer interfaceAGERE SYSTEMS INC·Filed 2006·Granted Mar 9, 2010·0 cites·23 claims
- 1532US6513083B1Hierarchical bus arbitrationAGERE SYSTEMS INC·Filed 1999·Granted Jan 28, 2003·6 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →