Inventor · disambiguated record
Shye-Lin Wu
Also filed as: WU SHYE-LIN
212 granted patents·2 pending applications·7,603 citations·filing 1992–2006
99Inventor score
Files withTEXAS INSTR ACER INC130POWERCHIP SEMICONDUCTOR CORP20ACER SEMICONDUCTOR MANUFACTURI10CHIP INTEGRATION TECH CO LTD8ACER SEMICONDUCTOR MFG INC7
Top patents by PatentIndex Score
214 records- 0199US5897348ALow mask count self-aligned silicided CMOS transistors with a high electrostatic discharge resistanceTEXAS INSTR ACER INC·Filed 1998·Granted Apr 27, 1999·378 cites·17 claims
- 0298US6770516B2Method of forming an N channel and P channel FINFET device on the same semiconductor substrateTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Aug 3, 2004·198 cites·26 claims
- 0398US5650351AMethod to form a capacitor having multiple pillars for advanced DRAMSVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Jul 22, 1997·417 cites·29 claims
- 0497US6063683AMethod of fabricating a self-aligned crown-shaped capacitor for high density DRAM cellsACER SEMICONDUCTOR MANUFACTURI·Filed 1998·Granted May 16, 2000·227 cites·20 claims
- 0596US6251731B1Method for fabricating high-density and high-speed nand-type mask romsACER SEMICONDUCTOR MFG INC·Filed 1999·Granted Jun 26, 2001·160 cites·21 claims
- 0696US6133102AMethod of fabricating double poly-gate high density multi-state flat mask ROM cellsFiled 1998·Granted Oct 17, 2000·154 cites·13 claims
- 0795US6096611AMethod to fabricate dual threshold CMOS circuitsTEXAS INSTR ACER INC·Filed 1998·Granted Aug 1, 2000·144 cites·7 claims
- 0895US6001695AMethod to form ultra-short channel MOSFET with a gate-side airgap structureTEXAS INSTR ACER INC·Filed 1998·Granted Dec 14, 1999·140 cites·27 claims
- 0995US5736446AMethod of fabricating a MOS device having a gate-side air-gap structurePOWERCHIP SEMICONDUCTOR CORP·Filed 1997·Granted Apr 7, 1998·175 cites·14 claims
- 1094US6137152APlanarized deep-shallow trench isolation for CMOS/bipolar devicesTEXAS INSTR ACER INC·Filed 1998·Granted Oct 24, 2000·168 cites·3 claims
- 1194US5994747AMOSFETs with recessed self-aligned silicide gradual S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Nov 30, 1999·132 cites·9 claims
- 1292US6136636AMethod of manufacturing deep sub-micron CMOS transistorsTEXAS INSTR ACER INC·Filed 1999·Granted Oct 24, 2000·103 cites·19 claims
- 1392US6034403AHigh density flat cell mask ROMACER SEMICONDUCTOR MANUFACTURI·Filed 1998·Granted Mar 7, 2000·87 cites·13 claims
- 1492US5907782AMethod of forming a multiple fin-pillar capacitor for a high density dram cellACER SEMICONDUCTOR MANUFACTURI·Filed 1998·Granted May 25, 1999·113 cites·29 claims
- 1591US7491633B2High switching speed two mask schottky diode with high field breakdownCHIP INTEGRATION TECH CO LTD·Filed 2006·Granted Feb 17, 2009·22 cites·10 claims
- 1691US7187046B2Method of forming an N channel and P channel finfet device on the same semiconductor substrateTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Mar 6, 2007·52 cites·10 claims
- 1791US6214696B1Method of fabricating deep-shallow trench isolationTEXAS INSTR ACER INC·Filed 1999·Granted Apr 10, 2001·120 cites·12 claims
- 1891US5989950AReduced mask CMOS salicided processTEXAS INSTR ACER INC·Filed 1998·Granted Nov 23, 1999·94 cites·27 claims
- 1990US5998264AMethod of forming high density flash memories with MIM structureFiled 1999·Granted Dec 7, 1999·92 cites·25 claims
- 2089US6114201AMethod of manufacturing a multiple fin-shaped capacitor for high density DRAMsTEXAS INSTR ACER INC·Filed 1998·Granted Sep 5, 2000·81 cites·20 claims
- 2189US5869374AMethod to form mosfet with an inverse T-shaped air-gap gate structureTEXAS INSTR ACER INC·Filed 1998·Granted Feb 9, 1999·85 cites·16 claims
- 2288US6569729B1Method of fabricating three dimensional CMOSFET devices for an embedded DRAM applicationTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted May 27, 2003·43 cites·12 claims
- 2388US5902125AMethod to form stacked-Si gate pMOSFETs with elevated and extended S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted May 11, 1999·77 cites·23 claims
- 2488US5880508AMOSFET with a high permitivity gate dielectricTEXAS INSTR ACER INC·Filed 1998·Granted Mar 9, 1999·78 cites·10 claims
- 2588US5747377AProcess for forming shallow trench isolationPOWERCHIP SEMICONDUCTOR CORP·Filed 1996·Granted May 5, 1998·93 cites·18 claims
- 2688US5710454ATungsten silicide polycide gate electrode formed through stacked amorphous silicon (SAS) multi-layer structure.VANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Jan 20, 1998·74 cites·22 claims
- 2787US6294416B1Method of fabricating CMOS transistors with self-aligned planarization twin-well by using fewer mask countsTEXAS INSTR ACER INC·Filed 1999·Granted Sep 25, 2001·67 cites·21 claims
- 2886US5915182AMOSFET with self-aligned silicidation and gate-side air-gap structureTEXAS INSTR ACER INC·Filed 1997·Granted Jun 22, 1999·81 cites·21 claims
- 2986US5429966AMethod of fabricating a textured tunnel oxide for EEPROM applicationsNAT SCIENCE COUNCIL·Filed 1993·Granted Jul 4, 1995·68 cites·7 claims
- 3085US6348390B1Method for fabricating MOSFETS with a recessed self-aligned silicide contact and extended source/drain junctionsACER SEMICONDUCTOR MFG CORP·Filed 1999·Granted Feb 19, 2002·70 cites·20 claims
- 3185US6165854AMethod to form shallow trench isolation with an oxynitride buffer layerTEXAS INSTR ACER INC·Filed 1998·Granted Dec 26, 2000·79 cites·20 claims
- 3284US6063706AMethod to simulataneously fabricate the self-aligned silicided devices and ESD protective devicesTEXAS INSTR ACER INC·Filed 1998·Granted May 16, 2000·57 cites·13 claims
- 3384US6060749AUltra-short channel elevated S/D MOSFETS formed on an ultra-thin SOI substrateTEXAS INSTR ACER INC·Filed 1998·Granted May 9, 2000·56 cites·4 claims
- 3484US5998247AProcess to fabricate the non-silicide region for electrostatic discharge protection circuitTEXAS INSTR ACER INC·Filed 1998·Granted Dec 7, 1999·58 cites·20 claims
- 3584US5817558AMethod of forming a T-gate Lightly-Doped Drain semiconductor deviceACER SEMICONDUCTOR MANUFACTURI·Filed 1997·Granted Oct 6, 1998·59 cites·20 claims
- 3684US5773348AMethod of fabricating a short-channel MOS devicePOWERCHIP SEMICONDUCTOR CORP·Filed 1997·Granted Jun 30, 1998·60 cites·15 claims
- 3783US6825073B1Schottky diode with high field breakdown and low reverse leakage currentCHIP INTEGRATION TECH CO LTD·Filed 2003·Granted Nov 30, 2004·32 cites·6 claims
- 3883US5972762AMethod of forming mosfets with recessed self-aligned silicide gradual S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Oct 26, 1999·55 cites·27 claims
- 3983US5930617AMethod of forming deep sub-micron CMOS transistors with self-aligned silicided contact and extended S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Jul 27, 1999·56 cites·18 claims
- 4083US5585295AMethod for forming inverse-T gate lightly-doped drain (ITLDD) deviceVANGUARD INT SEMICONDUCT CORP·Filed 1996·Granted Dec 17, 1996·55 cites·16 claims
- 4182US6331456B1Fipos method of forming SOI CMOS structureTEXAS INSTR ACER INC·Filed 1998·Granted Dec 18, 2001·65 cites·20 claims
- 4282US6187619B1Method to fabricate short-channel MOSFETs with an improvement in ESD resistanceFiled 1999·Granted Feb 13, 2001·52 cites·18 claims
- 4382US6162681ADRAM cell with a fork-shaped capacitorTEXAS INSTR ACER INC·Filed 1999·Granted Dec 19, 2000·44 cites·12 claims
- 4482US6069057AMethod for fabricating trench-isolation structurePOWERCHIP SEMICONDUCTOR CORP·Filed 1998·Granted May 30, 2000·65 cites·20 claims
- 4582US5856226AMethod of making ultra-short channel MOSFET with self-aligned silicided contact and extended S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted Jan 5, 1999·54 cites·22 claims
- 4682US5834353AMethod of making deep sub-micron meter MOSFET with a high permitivity gate dielectricTEXAS INSTR ACER INC·Filed 1997·Granted Nov 10, 1998·55 cites·16 claims
- 4780US6998694B2High switching speed two mask Schottky diode with high field breakdownCHIP INTEGRATION TECH CO LTD·Filed 2003·Granted Feb 14, 2006·26 cites·10 claims
- 4880US6180988B1Self-aligned silicided MOSFETS with a graded S/D junction and gate-side air-gap structureTEXAS INSTR ACER INC·Filed 1997·Granted Jan 30, 2001·58 cites·9 claims
- 4980US6008514ADouble-crown shape capacitor with high-dielectric constant materialFiled 1999·Granted Dec 28, 1999·32 cites·18 claims
- 5078US5920774AMethod to fabricate short-channel MOSFETS with an improvement in ESD resistanceTEXAS INSTR ACER INCORPORATE·Filed 1998·Granted Jul 6, 1999·50 cites·14 claims
Showing the top 50 of 214 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →