Inventor · disambiguated record
Soroush Abbaspour
Also filed as: ABBASPOUR SOROUSH
17 granted patents·2 pending applications·94 citations·filing 2005–2017
92Inventor score
Top patents by PatentIndex Score
19 records- 0187US7739640B2Method and apparatus for static timing analysis in the presence of a coupling event and process variationIBM·Filed 2007·Granted Jun 15, 2010·19 cites·18 claims
- 0283US7814448B2Representing and propagating a variational voltage waveform in statistical static timing analysis of digital circuitsIBM·Filed 2007·Granted Oct 12, 2010·13 cites·15 claims
- 0382US7788617B2Method of modeling and employing the CMOS gate slew and output load dependent pin capacitance during timing analysisIBM·Filed 2008·Granted Aug 31, 2010·12 cites·14 claims
- 0481US7594209B2Method for incorporating Miller capacitance effects in digital circuits for an accurate timing analysisIBM·Filed 2007·Granted Sep 22, 2009·11 cites·18 claims
- 0578US7685549B2Method of constrained aggressor set selection for crosstalk induced noiseIBM·Filed 2007·Granted Mar 23, 2010·10 cites·24 claims
- 0675US8020129B2Multiple voltage threshold timing analysis for a digital integrated circuitIBM·Filed 2008·Granted Sep 13, 2011·7 cites·15 claims
- 0771US8549452B2Method for supporting multiple libraries characterized at different process, voltage and temperature pointsBANERJI REVANTA·Filed 2010·Granted Oct 1, 2013·5 cites·20 claims
- 0870US8103997B2Method of employing slew dependent pin capacitances to capture interconnect parasitics during timing abstraction of VLSI circuitsSINHA DEBJIT·Filed 2009·Granted Jan 24, 2012·6 cites·21 claims
- 0968US8122411B2Method of performing static timing analysis considering abstracted cell's interconnect parasiticsABBASPOUR SOROUSH·Filed 2009·Granted Feb 21, 2012·4 cites·16 claims
- 1065US7941775B2Arbitrary waveform propagation through a logic gate using timing analysis resultsIBM·Filed 2008·Granted May 10, 2011·3 cites·20 claims
- 1162US7552412B2Integrated circuit (IC) chip design method, program product and systemIBM·Filed 2005·Granted Jun 23, 2009·2 cites·26 claims
- 1260US8515725B2Characterization of nonlinear cell macro model for timing analysisFELDMANN PETER·Filed 2010·Granted Aug 20, 2013·2 cites·25 claims
- 1351US8359563B2Moment-based characterization waveform for static timing analysisIBM·Filed 2009·Granted Jan 22, 2013·0 cites·18 claims
- 1450US8108815B2Order independent method of performing statistical N-way maximum/minimum operation for non-Gaussian and non-linear distributionsABBASPOUR SOROUSH·Filed 2009·Granted Jan 31, 2012·0 cites·17 claims
- 1548US2019198174A1Patient assistant for chronic diseases and co-morbiditiesIBM·Filed 2017·Application pending·0 cites
- 1642US8239810B2Method and system for optimizing a device with current source modelsABBASPOUR SOROUSH·Filed 2010·Granted Aug 7, 2012·0 cites·16 claims
- 1739US8463571B2Performing reliability analysis of signal wiresABBASPOUR SOROUSH·Filed 2010·Granted Jun 11, 2013·0 cites·20 claims
- 1837US8396910B2Efficient compression and handling of model library waveformsABBASPOUR SOROUSH·Filed 2008·Granted Mar 12, 2013·0 cites·25 claims
- 1937US2012245904A1Waveform-based digital gate modeling for timing analysisABBASPOUR SOROUSH·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →