Inventor · disambiguated record
Songmin Kim
Also filed as: KIM SONGMIN
15 granted patents·1 pending application·487 citations·filing 1996–2006
94Inventor score
Top patents by PatentIndex Score
16 records- 0193US6535047B2Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensationINTEL CORP·Filed 2001·Granted Mar 18, 2003·53 cites·26 claims
- 0291US6424170B1Apparatus and method for linear on-die termination in an open drain bus architecture systemINTEL CORP·Filed 2001·Granted Jul 23, 2002·97 cites·20 claims
- 0391US6411122B1Apparatus and method for dynamic on-die termination in an open-drain bus architecture systemINTEL CORP·Filed 2000·Granted Jun 25, 2002·101 cites·38 claims
- 0490US7417459B2On-die offset reference circuit blockINTEL CORP·Filed 2005·Granted Aug 26, 2008·21 cites·14 claims
- 0590US6748549B1Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clockINTEL CORP·Filed 2000·Granted Jun 8, 2004·48 cites·29 claims
- 0688US6717455B2Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensationINTEL CORP·Filed 2003·Granted Apr 6, 2004·33 cites·16 claims
- 0785US7038512B2Closed-loop independent DLL-controlled rise/fall time control circuitINTEL CORP·Filed 2004·Granted May 2, 2006·30 cites·59 claims
- 0878US7429881B2Wide input common mode sense amplifierINTEL CORP·Filed 2006·Granted Sep 30, 2008·12 cites·21 claims
- 0977US6407591B1Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signalsINTEL CORP·Filed 2000·Granted Jun 18, 2002·25 cites·15 claims
- 1073US6240123B1Asynchronous spread spectrum clockingINTEL CORP·Filed 1998·Granted May 29, 2001·44 cites·19 claims
- 1158US7038513B2Closed-loop independent DLL-controlled rise/fall time control circuitINTEL CORP·Filed 2004·Granted May 2, 2006·8 cites·34 claims
- 1244US7197659B2Global I/O timing adjustment using calibrated delay elementsINTEL CORP·Filed 2001·Granted Mar 27, 2007·4 cites·20 claims
- 1344US7038505B2Configurable enabling pulse clock generation for multiple signaling modesINTEL CORP·Filed 2003·Granted May 2, 2006·3 cites·17 claims
- 1442US5856755ABus termination voltage supplyINTEL CORP·Filed 1996·Granted Jan 5, 1999·8 cites·21 claims
- 1542US2007157049A1Adjusting input output timingKIM SONGMIN·Filed 2005·Application pending·0 cites
- 1639US7276942B2Method for configurably enabling pulse clock generation for multiple signaling modesINTEL CORP·Filed 2006·Granted Oct 2, 2007·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →