Inventor · disambiguated record
Soo Won Lee
Also filed as: LEE SOO WON · LEE SOO-GEUN
13 granted patents·7 pending applications·71 citations·filing 1996–2024
90Inventor score
Files withSTATS CHIPPAC SEMICONDUCTOR JIANGYIN CO LTD4FOUNDATION SOONGSIL UNIV INDUSTRY COOPERATION3HYUNDAI ELECTRONICS IND2LEE SOO WON2SAMSUNG ELECTRONICS CO LTD2
Top patents by PatentIndex Score
20 records- 0188US9799621B2Semiconductor device and method of forming duplex plated bump-on-lead pad over substrate for finer pitch between adjacent tracesSTATS CHIPPAC LTD·Filed 2014·Granted Oct 24, 2017·11 cites·10 claims
- 0282US10185996B2Stock fluctuation prediction method and serverFOUNDATION SOONGSIL UNIV INDUSTRY COOPERATION·Filed 2016·Granted Jan 22, 2019·5 cites·11 claims
- 0378US10394864B2Method and server for extracting topic and evaluating suitability of the extracted topicFOUNDATION SOONGSIL UNIV INDUSTRY COOPERATION·Filed 2014·Granted Aug 27, 2019·9 cites·9 claims
- 0478US9412624B1Integrated circuit packaging system with substrate and method of manufacture thereofCUONG DAO NGUYEN PHU·Filed 2014·Granted Aug 9, 2016·6 cites·20 claims
- 0575US7915724B2Integrated circuit packaging system with base structure deviceSTATS CHIPPAC LTD·Filed 2007·Granted Mar 29, 2011·6 cites·20 claims
- 0673US9384189B2Apparatus and method for predicting the pleasantness-unpleasantness index of words using relative emotion similarityFOUNDATION SOONGSIL UNIV INDUSTRY COOPERATION·Filed 2014·Granted Jul 5, 2016·3 cites·8 claims
- 0766US8956429B2Composition for cutting wheel and cutting wheel by using the sameLEE DOO-HYUN·Filed 2010·Granted Feb 17, 2015·2 cites·15 claims
- 0856US2017032270A1Method for predicting personality trait and device thereforFOUND OF SOONGSIL UNIV IND COOP·Filed 2014·Application pending·0 cites
- 0955US2024404930A1Package structure and related manufacturing method thereofSTATS CHIPPAC SEMICONDUCTOR JIANGYIN CO LTD·Filed 2024·Application pending·0 cites
- 1052US2024363515A1Semiconductor package structure and forming method thereofSTATS CHIPPAC SEMICONDUCTOR JIANGYIN CO LTD·Filed 2024·Application pending·0 cites
- 1152US2024379701A1Sensor package structure and packaging methodSTATS CHIPPAC SEMICONDUCTOR JIANGYIN CO LTD·Filed 2024·Application pending·0 cites
- 1251US2024363601A1Chip package structure and preparation method thereofSTATS CHIPPAC SEMICONDUCTOR JIANGYIN CO LTD·Filed 2024·Application pending·0 cites
- 1349US10109587B1Integrated circuit packaging system with substrate and method of manufacture thereofSTATS CHIPPAC PTE LTD·Filed 2016·Granted Oct 23, 2018·0 cites·20 claims
- 1447US5789275AMethod for fabricating a laser diodeHYUNDAI ELECTRONICS IND·Filed 1996·Granted Aug 4, 1998·14 cites·9 claims
- 1544US6420440B1Method for recycling alignment layer materialsSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Jul 16, 2002·2 cites·14 claims
- 1644US5693558AMethod for fabricating a laser diodeHYUNDAI ELECTRONICS IND·Filed 1996·Granted Dec 2, 1997·11 cites·8 claims
- 1738US2013249076A1Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent TracesLEE SOO WON·Filed 2012·Application pending·0 cites
- 1837US2004029386A1Method of patterning inter-metal dielectric layersFiled 2003·Application pending·0 cites
- 1933US8709932B2Integrated circuit packaging system with interconnects and method of manufacture thereofLEE SOO WON·Filed 2010·Granted Apr 29, 2014·0 cites·20 claims
- 2030US6495055B2Variable time etching system according to the accumulated number of devices being processed and a method for etching in the same mannerSAMSUNG ELECTRONICS CO LTD·Filed 1999·Granted Dec 17, 2002·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →