Inventor · disambiguated record
Soon Chieh Lim
Also filed as: LIM SOON C · LIM SOON CHIEH
17 granted patents·5 pending applications·52 citations·filing 2002–2024
89Inventor score
Top patents by PatentIndex Score
22 records- 0188US7779287B2Reducing power consumption in multiprocessor systemsINTEL CORP·Filed 2005·Granted Aug 17, 2010·27 cites·21 claims
- 0286US11349481B1I/O transmitter circuitry for supporting multi-modes serializationSKYECHIP SDN BHD·Filed 2021·Granted May 31, 2022·3 cites·11 claims
- 0371US7689960B2Programmable via modelingEASIC CORP·Filed 2006·Granted Mar 30, 2010·8 cites·8 claims
- 0462US12393255B2System and a method for network-on-chip power managementSKYECHIP SDN BHD·Filed 2023·Granted Aug 19, 2025·0 cites·11 claims
- 0561US7428652B2Programmable phase generator for cross-clock communication where the clock frequency ratio is a rational numberINTEL CORP·Filed 2005·Granted Sep 23, 2008·3 cites·18 claims
- 0660US7759971B2Single via structured IC deviceEASIC CORP·Filed 2007·Granted Jul 20, 2010·3 cites·18 claims
- 0757US11373694B1Generic physical layer providing a unified architecture for interfacing with an external memory device and methods of interfacing with an external memory deviceSKYECHIP SDN BHD·Filed 2021·Granted Jun 28, 2022·0 cites·13 claims
- 0857US2025258771A1Coherent system and a method of maintaining cache coherence using thereofSKYECHIP SDN BHD·Filed 2024·Application pending·0 cites
- 0956US6950894B2Techniques using integrated circuit chip capable of being coupled to storage systemINTEL CORP·Filed 2002·Granted Sep 27, 2005·8 cites·28 claims
- 1053US12199884B2Method and a system for network-on-chip arbitrationSKYECHIP SDN BHD·Filed 2022·Granted Jan 14, 2025·0 cites·7 claims
- 1151US12422883B2System and a method for aligning a programmable clock or strobeSKYECHIP SDN BHD·Filed 2023·Granted Sep 23, 2025·0 cites·10 claims
- 1251US11442878B2Memory sequencer system and a method of memory sequencing using thereofSKYECHIP SDN BHD·Filed 2021·Granted Sep 13, 2022·0 cites·21 claims
- 1347US2024070039A1Method of debugging network-on-chipSKYECHIP SDN BHD·Filed 2022·Application pending·0 cites
- 1446US2024297846A1Network-on-chip packetization and routing method and apparatus for scalable high-performance networking on and off chipSKYECHIP SDN BHD·Filed 2023·Application pending·0 cites
- 1545US12149407B2System and method for transferring configuration, management, debug information and asynchronous events between network-on-chip (NOC) and external interfaceSKYECHIP SDN BHD·Filed 2022·Granted Nov 19, 2024·0 cites·35 claims
- 1645US12125518B2Method and apparatus of receive enable margining in memory interfaceSKYECHIP SDN BHD·Filed 2022·Granted Oct 22, 2024·0 cites·4 claims
- 1744US12210633B2Memory controller for improving data integrity and providing data security and a method of operating thereofSKYECHIP SDN BHD·Filed 2021·Granted Jan 28, 2025·0 cites·18 claims
- 1844US11349691B1Apparatus and a method for handling non-continuous data transfer for a decision feedback equalizer in a memory subsystemSKYECHIP SDN BHD·Filed 2021·Granted May 31, 2022·0 cites·6 claims
- 1941US11509312B1Apparatus and a method for synchronizing output clock signals across a plurality of phase-locked loopsSKYECHIP SDN BHD·Filed 2021·Granted Nov 22, 2022·0 cites·8 claims
- 2041US2006048156A1Unified control storeLIM SOON C·Filed 2004·Application pending·0 cites
- 2141US2007174529A1Queue manager having a multi-level arbitratorINTEL CORP·Filed 2005·Application pending·0 cites
- 2232US8504865B2Dynamic phase alignmentKHOR CHOON KEAT·Filed 2007·Granted Aug 6, 2013·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →