Inventor · disambiguated record
Stephen P. Glancy
Also filed as: GLANCY STEPHEN · GLANCY STEPHEN P
26 granted patents·2 pending applications·133 citations·filing 1985–2021
95Inventor score
Top patents by PatentIndex Score
28 records- 0198US9558850B1Efficient calibration of a data eye for memory devicesIBM·Filed 2015·Granted Jan 31, 2017·48 cites·19 claims
- 0295US9620184B1Efficient calibration of memory devicesIBM·Filed 2015·Granted Apr 11, 2017·18 cites·19 claims
- 0394US11200112B1Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channelIBM·Filed 2020·Granted Dec 14, 2021·3 cites·20 claims
- 0494US9760504B2Nonvolatile memory data securityIBM·Filed 2015·Granted Sep 12, 2017·11 cites·12 claims
- 0585US9627030B1Efficient calibration of a data eye for memory devicesIBM·Filed 2016·Granted Apr 18, 2017·5 cites·1 claims
- 0681US10446255B2Reference voltage calibration in memory during runtimeIBM·Filed 2016·Granted Oct 15, 2019·6 cites·13 claims
- 0779US9691453B1Efficient calibration of memory devicesIBM·Filed 2016·Granted Jun 27, 2017·4 cites·20 claims
- 0877US9734095B2Nonvolatile memory data securityIBM·Filed 2015·Granted Aug 15, 2017·2 cites·12 claims
- 0974US10606696B2Internally-generated data storage in spare memory locationsIBM·Filed 2017·Granted Mar 31, 2020·2 cites·14 claims
- 1073US10134455B2Efficient calibration of a data eye for memory devicesIBM·Filed 2017·Granted Nov 20, 2018·2 cites·13 claims
- 1172US9899067B2Efficient calibration of a data eye for memory devicesIBM·Filed 2017·Granted Feb 20, 2018·2 cites·13 claims
- 1271US11698842B2Efficient and selective sparing of bits in memory systemsIBM·Filed 2021·Granted Jul 11, 2023·0 cites·19 claims
- 1369US10580476B2Simulating a single data rate (SDR) mode on a dual data rate (DDR) memory controller for calibrating DDR memory coarse alignmentIBM·Filed 2018·Granted Mar 3, 2020·3 cites·20 claims
- 1469US10261856B2Bitwise sparing in a memory systemIBM·Filed 2016·Granted Apr 16, 2019·3 cites·9 claims
- 1568US11593196B2Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channelIBM·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 1665US11182262B2Efficient and selective sparing of bits in memory systemsIBM·Filed 2020·Granted Nov 23, 2021·0 cites·20 claims
- 1765US10068634B2Simultaneous write and read calibration of an interface within a circuitIBM·Filed 2016·Granted Sep 4, 2018·2 cites·18 claims
- 1865US9753806B1Implementing signal integrity fail recovery and mainline calibration for DRAMIBM·Filed 2016·Granted Sep 5, 2017·2 cites·20 claims
- 1964US4606768AHigh impact strength powder metal part and method for making sameSCM CORP·Filed 1985·Granted Aug 19, 1986·19 cites·13 claims
- 2060US10090065B1Simultaneous write, read, and command-address-control calibration of an interface within a circuitIBM·Filed 2017·Granted Oct 2, 2018·1 cites·20 claims
- 2156US10936222B2Hardware abstraction in software or firmware for hardware calibrationIBM·Filed 2019·Granted Mar 2, 2021·0 cites·20 claims
- 2250US10671497B2Efficient and selective sparing of bits in memory systemsIBM·Filed 2018·Granted Jun 2, 2020·0 cites·17 claims
- 2347US10289578B2Per-DRAM and per-buffer addressability shadow registers and write-back functionalityIBM·Filed 2015·Granted May 14, 2019·0 cites·20 claims
- 2446US2021267453A1Self-correcting temperature and notification systemIBM·Filed 2020·Application pending·0 cites
- 2544US2018322939A1Simultaneous write, read, and command-address-control calibration of an interface within a circuitIBM·Filed 2018·Application pending·0 cites
- 2642US10585672B2Memory device command-address-control calibrationIBM·Filed 2016·Granted Mar 10, 2020·0 cites·14 claims
- 2742US10126968B2Efficient configuration of memory componentsIBM·Filed 2015·Granted Nov 13, 2018·0 cites·17 claims
- 2840US9940417B2Simulating reference voltage response in digital simulation environmentsIBM·Filed 2016·Granted Apr 10, 2018·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →