Inventor · disambiguated record
Stavros Kalafatis
Also filed as: KALAFATIS STAVROS
13 granted patents·642 citations·filing 1995–2002
95Inventor score
Files withINTEL CORP13
Top patents by PatentIndex Score
13 records- 0195US6535905B1Method and apparatus for thread switching within a multithreaded processorINTEL CORP·Filed 1999·Granted Mar 18, 2003·180 cites·81 claims
- 0291US6981261B2Method and apparatus for thread switching within a multithreaded processorINTEL CORP·Filed 2002·Granted Dec 27, 2005·47 cites·81 claims
- 0390US6785890B2Method and system to perform a thread switching operation within a multithreaded processor based on detection of the absence of a flow of instruction information for a threadINTEL CORP·Filed 2002·Granted Aug 31, 2004·39 cites·16 claims
- 0489US6795845B2Method and system to perform a thread switching operation within a multithreaded processor based on detection of a branch instructionINTEL CORP·Filed 2002·Granted Sep 21, 2004·37 cites·18 claims
- 0589US6374350B1System and method of maintaining and utilizing multiple return stack buffersINTEL CORP·Filed 2000·Granted Apr 16, 2002·58 cites·16 claims
- 0681US6151671ASystem and method of maintaining and utilizing multiple return stack buffersINTEL CORP·Filed 1998·Granted Nov 21, 2000·97 cites·6 claims
- 0780US7448025B2Qualification of event detection by thread ID and thread privilege levelINTEL CORP·Filed 2000·Granted Nov 4, 2008·35 cites·28 claims
- 0880US6971104B2Method and system to perform a thread switching operation within a multithreaded processor based on dispatch of a quantity of instruction information for a full instructionINTEL CORP·Filed 2002·Granted Nov 29, 2005·18 cites·12 claims
- 0979US6854118B2Method and system to perform a thread switching operation within a multithreaded processor based on detection of a flow marker within an instruction informationINTEL CORP·Filed 2002·Granted Feb 8, 2005·16 cites·18 claims
- 1075US6865740B2Method and system to insert a flow marker into an instruction stream to indicate a thread switching operation within a multithreaded processorINTEL CORP·Filed 2002·Granted Mar 8, 2005·12 cites·16 claims
- 1175US6055630ASystem and method for processing a plurality of branch instructions by a plurality of storage devices and pipeline unitsINTEL CORP·Filed 1998·Granted Apr 25, 2000·73 cites·23 claims
- 1274US6850961B2Method and system to perform a thread switching operation within a multithreaded processor based on detection of a stall conditionINTEL CORP·Filed 2002·Granted Feb 1, 2005·11 cites·20 claims
- 1355US5546434ADual edge adjusting digital phase-locked loop having one-half reference clock jitterINTEL CORP·Filed 1995·Granted Aug 13, 1996·19 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →