Inventor · disambiguated record
Stefan Payer
Also filed as: PAYER STEFAN
27 granted patents·3 pending applications·35 citations·filing 2012–2022
92Inventor score
Top patents by PatentIndex Score
30 records- 0194US10169451B1Rapid character substring searchingIBM·Filed 2018·Granted Jan 1, 2019·22 cites·16 claims
- 0276US10732972B2Non-overlapping substring detection within a data element stringIBM·Filed 2018·Granted Aug 4, 2020·2 cites·20 claims
- 0372US8918749B2Integrated circuit schematics having imbedded scaling information for generating a design instanceIBM·Filed 2013·Granted Dec 23, 2014·3 cites·6 claims
- 0470US9977680B2Clock-gating for multicycle instructionsIBM·Filed 2016·Granted May 22, 2018·1 cites·17 claims
- 0568US10747819B2Rapid partial substring matchingIBM·Filed 2018·Granted Aug 18, 2020·1 cites·14 claims
- 0667US11817697B2Method to limit the time a semiconductor device operates above a maximum operating voltageIBM·Filed 2022·Granted Nov 14, 2023·0 cites·25 claims
- 0764US8659963B2Enhanced power savings for memory arraysDENGLER OSAMA·Filed 2012·Granted Feb 25, 2014·4 cites·18 claims
- 0861US11663270B2Vector string search instructionIBM·Filed 2021·Granted May 30, 2023·0 cites·19 claims
- 0960US12190078B2Rounding hexadecimal floating point numbers using binary incrementorsIBM·Filed 2022·Granted Jan 7, 2025·0 cites·20 claims
- 1058US10983159B2Method and apparatus for wiring multiple technology evaluation circuitsIBM·Filed 2018·Granted Apr 20, 2021·0 cites·17 claims
- 1157US12056465B2Verifying the correctness of a leading zero counterIBM·Filed 2022·Granted Aug 6, 2024·0 cites·20 claims
- 1257US11068541B2Vector string search instructionIBM·Filed 2019·Granted Jul 20, 2021·0 cites·16 claims
- 1357US10552167B2Clock-gating for multicycle instructionsIBM·Filed 2017·Granted Feb 4, 2020·0 cites·20 claims
- 1457US9704567B1Stressing and testing semiconductor memory cellsIBM·Filed 2016·Granted Jul 11, 2017·1 cites·17 claims
- 1554US11099602B2Fault-tolerant clock gatingIBM·Filed 2019·Granted Aug 24, 2021·0 cites·20 claims
- 1654US11042371B2Plausability-driven fault detection in result logic and condition codes for fast exact substring matchIBM·Filed 2019·Granted Jun 22, 2021·0 cites·20 claims
- 1753US11175921B2Cognitive binary coded decimal to binary number conversion hardware for evaluating a preferred instruction variant based on feedbackIBM·Filed 2018·Granted Nov 16, 2021·0 cites·18 claims
- 1852US10996951B2Plausibility-driven fault detection in string termination logic for fast exact substring matchIBM·Filed 2019·Granted May 4, 2021·0 cites·20 claims
- 1951US10890622B2Integrated circuit control latch protectionIBM·Filed 2019·Granted Jan 12, 2021·0 cites·20 claims
- 2050US9715944B1Automatic built-in self test for memory arraysIBM·Filed 2016·Granted Jul 25, 2017·1 cites·4 claims
- 2149US11256511B2Instruction scheduling during execution in a processorIBM·Filed 2019·Granted Feb 22, 2022·0 cites·20 claims
- 2248US11531546B2Hexadecimal floating point multiply and add instructionIBM·Filed 2021·Granted Dec 20, 2022·0 cites·25 claims
- 2348US11210064B2Parallelized rounding for decimal floating point to binary coded decimal conversionIBM·Filed 2019·Granted Dec 28, 2021·0 cites·20 claims
- 2448US2023289138A1Hardware device to execute instruction to convert input value from one data format to another data formatIBM·Filed 2022·Application pending·0 cites
- 2548US2023289139A1Hardware device to execute instruction to convert input value from one data format to another data formatIBM·Filed 2022·Application pending·0 cites
- 2645US10782968B2Rapid substring detection within a data element stringIBM·Filed 2018·Granted Sep 22, 2020·0 cites·20 claims
- 2745US9837142B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2016·Granted Dec 5, 2017·0 cites·9 claims
- 2845US9805823B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2017·Granted Oct 31, 2017·0 cites·8 claims
- 2941US11221826B2Parallel rounding for conversion from binary floating point to binary coded decimalIBM·Filed 2019·Granted Jan 11, 2022·0 cites·20 claims
- 3041US2023308113A1Reduced logic conversion of binary integers to binary coded decimalsIBM·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →