Inventor · disambiguated record
Stefano Surico
Also filed as: SURICO STEFANO
21 granted patents·2 pending applications·143 citations·filing 2002–2014
94Inventor score
Top patents by PatentIndex Score
23 records- 0193US7417904B2Adaptive gate voltage regulationATMEL CORP·Filed 2006·Granted Aug 26, 2008·35 cites·23 claims
- 0291US7249215B2System for configuring parameters for a flash memoryATMEL CORP·Filed 2006·Granted Jul 24, 2007·26 cites·22 claims
- 0389US7181565B2Method and system for configuring parameters for flash memoryATMEL CORP·Filed 2005·Granted Feb 20, 2007·21 cites·27 claims
- 0488US7158415B2System for performing fast testing during flash reference cell settingATMEL CORP·Filed 2005·Granted Jan 2, 2007·21 cites·27 claims
- 0574US8884666B2Clock generatorPASSERINI MARCO·Filed 2011·Granted Nov 11, 2014·4 cites·22 claims
- 0674US7302518B2Method and system for managing a suspend request in a flash memoryATMEL CORP·Filed 2005·Granted Nov 27, 2007·8 cites·30 claims
- 0763US7570519B2Method and system for program pulse generation during programming of nonvolatile electronic devicesATMEL CORP·Filed 2005·Granted Aug 4, 2009·4 cites·20 claims
- 0860US7284144B2Finite state machine interface has arbitration structure to store command generated by internal circuits during evaluation phase of state machine for FLASH EEPROM deviceST MICROELECTRONICS SRL·Filed 2002·Granted Oct 16, 2007·8 cites·25 claims
- 0953US7589572B2Method and device for managing a power supply power-on sequenceATMEL CORP·Filed 2006·Granted Sep 15, 2009·3 cites·11 claims
- 1053US7525856B2Apparatus and method to manage external voltage for semiconductor memory testing with serial interfaceATMEL CORP·Filed 2007·Granted Apr 28, 2009·3 cites·7 claims
- 1151US9349480B2Erase techniques and circuits therefor for non-volatile memory devicesPS4 LUXCO SARL·Filed 2014·Granted May 24, 2016·1 cites·6 claims
- 1250US8705283B2Erase techniques and circuits therefor for non-volatile memory devicesFERRAGINA VINCENZO·Filed 2011·Granted Apr 22, 2014·2 cites·18 claims
- 1350US7864583B2Erase verify for memory devicesATMEL CORP·Filed 2008·Granted Jan 4, 2011·3 cites·26 claims
- 1450US7769943B2Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memoryATMEL CORP·Filed 2007·Granted Aug 3, 2010·2 cites·5 claims
- 1547US7345921B2Method and system for a programming approach for a nonvolatile electronic deviceATMEL CORP·Filed 2005·Granted Mar 18, 2008·1 cites·15 claims
- 1645US8120963B2Method and system for program pulse generation during programming of nonvolatile electronic devicesSURICO STEFANO·Filed 2009·Granted Feb 21, 2012·1 cites·7 claims
- 1743US7404049B2Method and system for managing address bits during buffered program operations in a memory deviceATMEL CORP·Filed 2005·Granted Jul 22, 2008·0 cites·19 claims
- 1842US8553460B2Method and system for program pulse generation during programming of nonvolatile electronic devicesSURICO STEFANO·Filed 2012·Granted Oct 8, 2013·0 cites·20 claims
- 1942US2014173173A1Method, device, and system including configurable bit-per-cell capabilityELPIDA MEMORY INC·Filed 2012·Application pending·0 cites
- 2039US2014372666A1Semiconductor device with configurable support for multiple command specifications, and method regarding the samePS4 LUXCO SARL·Filed 2013·Application pending·0 cites
- 2136US8456917B1Logic circuit for a semiconductor memory device, and method of managing an operation in the semiconductor memory deviceSURICO STEFANO·Filed 2011·Granted Jun 4, 2013·0 cites·20 claims
- 2235US7551498B2Implementation of column redundancy for a flash memory with a high write parallelismATMEL CORP·Filed 2006·Granted Jun 23, 2009·0 cites·29 claims
- 2335US7447071B2Low voltage column decoder sharing a memory array p-wellATMEL CORP·Filed 2006·Granted Nov 4, 2008·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →