Inventor · disambiguated record
Stephen Szulewski
Also filed as: SZULEWSKI STEPHEN · SZULEWSKI STEPHEN K
7 granted patents·1 pending application·33 citations·filing 2004–2017
81Inventor score
Top patents by PatentIndex Score
8 records- 0188US9684756B1Assigning nets to wiring planes using zero wire load and signal propagation timing for chip designIBM·Filed 2016·Granted Jun 20, 2017·9 cites·1 claims
- 0270US7120888B2Method, system and storage medium for determining circuit placementIBM·Filed 2004·Granted Oct 10, 2006·14 cites·13 claims
- 0369US7305644B2Negative slack recoverability factor—a net weight to enhance timing closure behaviorIBM·Filed 2005·Granted Dec 4, 2007·5 cites·16 claims
- 0464US7290233B2Method for netlist path characteristics extractionIBM·Filed 2005·Granted Oct 30, 2007·3 cites·13 claims
- 0561US7487484B2Method, system and storage medium for determining circuit placementIBM·Filed 2006·Granted Feb 3, 2009·2 cites·7 claims
- 0642US10042972B2Assigning nets to wiring planes using zero wire load and signal propagation timing for chip designIBM·Filed 2017·Granted Aug 7, 2018·0 cites·1 claims
- 0742US2008046850A1Integrated Circuit Implementing Improved Timing Driven Placements of Elements of a CircuitIBM·Filed 2007·Application pending·0 cites
- 0838US8171442B2Method and system to at least partially isolate netsECHEGARAY ALEXANDRA·Filed 2009·Granted May 1, 2012·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →