Inventor · disambiguated record
Subbarao Arumilli
Also filed as: ARUMILLI SUBBARAO
22 granted patents·4 pending applications·174 citations·filing 2002–2024
94Inventor score
Files withASTERA LABS INC18ARUMILLI SUBBARAO2BROCADE COMM SYSTEMS INC2CISCO TECH INC1GALLES MICHAEL B1
Top patents by PatentIndex Score
26 records- 0197US11424905B1Retimer with mesochronous intra-lane path controllersASTERA LABS INC·Filed 2021·Granted Aug 23, 2022·14 cites·21 claims
- 0296US11150687B1Low-latency retimer with seamless clock switchoverASTERA LABS INC·Filed 2020·Granted Oct 19, 2021·7 cites·21 claims
- 0396US8249069B2Forwarding multi-destination packets in a network with virtual port channelsRAMAN PIRABHU·Filed 2010·Granted Aug 21, 2012·102 cites·20 claims
- 0494US11487317B1Low-latency retimer with seamless clock switchoverASTERA LABS INC·Filed 2021·Granted Nov 1, 2022·3 cites·21 claims
- 0591US11722152B1Capacity-expanding memory control componentASTERA LABS INC·Filed 2021·Granted Aug 8, 2023·2 cites·18 claims
- 0690US11258696B1Low-latency signaling-link retimerASTERA LABS INC·Filed 2020·Granted Feb 22, 2022·3 cites·18 claims
- 0790US9337120B2Multi-chip module with multiple interposersLI LI·Filed 2012·Granted May 10, 2016·13 cites·24 claims
- 0889US12061793B1Capacity-expanding memory control componentASTERA LABS INC·Filed 2022·Granted Aug 13, 2024·2 cites·25 claims
- 0988US12323164B1Capacity-expanding memory control componentASTERA LABS INC·Filed 2023·Granted Jun 3, 2025·1 cites·23 claims
- 1086US8972611B2Multi-server consolidated input/output (IO) deviceGALLES MICHAEL B·Filed 2011·Granted Mar 3, 2015·10 cites·21 claims
- 1181US9705808B2Flow aware buffer management for data center switchesCISCO TECH INC·Filed 2014·Granted Jul 11, 2017·6 cites·17 claims
- 1279US8565092B2Dynamic flow redistribution for head of line blocking avoidanceARUMILLI SUBBARAO·Filed 2010·Granted Oct 22, 2013·11 cites·23 claims
- 1378US12277002B1Low-latency retimer with seamless clock switchoverASTERA LABS INC·Filed 2023·Granted Apr 15, 2025·0 cites·21 claims
- 1477US12489590B1Retimer with path-coordinated flow-rate compensationASTERA LABS INC·Filed 2024·Granted Dec 2, 2025·0 cites·18 claims
- 1574US11853115B1Low-latency retimer with seamless clock switchoverASTERA LABS INC·Filed 2022·Granted Dec 26, 2023·0 cites·18 claims
- 1673US12095480B1Capacity-expanding memory control componentASTERA LABS INC·Filed 2023·Granted Sep 17, 2024·0 cites·21 claims
- 1768US12003610B1Retimer with mesochronous intra-lane path controllersASTERA LABS INC·Filed 2022·Granted Jun 4, 2024·0 cites·15 claims
- 1868US11949629B1Retimer with path-coordinated flow-rate compensationASTERA LABS INC·Filed 2022·Granted Apr 2, 2024·0 cites·18 claims
- 1961US12143288B1Low-latency signaling-link retimerASTERA LABS INC·Filed 2022·Granted Nov 12, 2024·0 cites·21 claims
- 2061US11349626B1Retimer with path-coordinated flow-rate compensationASTERA LABS INC·Filed 2020·Granted May 31, 2022·0 cites·16 claims
- 2158US12032479B2Metadata-caching integrated circuit deviceASTERA LABS INC·Filed 2022·Granted Jul 9, 2024·0 cites·22 claims
- 2257US2025370930A1Metadata-caching integrated circuit deviceASTERA LABS INC·Filed 2024·Application pending·0 cites
- 2354US11327913B1Configurable-aggregation retimer with media-dedicated controllersASTERA LABS INC·Filed 2020·Granted May 10, 2022·0 cites·22 claims
- 2446US2008181243A1Ethernet forwarding in high performance fabricsBROCADE COMM SYSTEMS INC·Filed 2007·Application pending·0 cites
- 2541US2004028043A1Method and apparatus for virtualizing storage devices inside a storage area network fabricBROCADE COMM SYSTEMS INC·Filed 2002·Application pending·0 cites
- 2631US2012307641A1Dynamic Flow Segregation for Optimal Load Balancing Among Ports in an Etherchannel GroupARUMILLI SUBBARAO·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →