Inventor · disambiguated record
Suryanarayana Murthy Durbhakula
Also filed as: DURBHAKULA SURYANARAYANA MURTHY
6 granted patents·5 pending applications·6 citations·filing 2012–2024
70Inventor score
Top patents by PatentIndex Score
11 records- 0181US12229054B2Reconfigurable caches for improving performance of graphics processing unitsQUALCOMM INC·Filed 2023·Granted Feb 18, 2025·1 cites·30 claims
- 0277US12164429B2Stride-based prefetcher circuits for prefetching next stride(s) into cache memory based on identified cache access stride patterns, and related processor-based systems and methodsQUALCOMM INC·Filed 2022·Granted Dec 10, 2024·1 cites·31 claims
- 0366US9304927B2Adaptive stride prefetcherDURBHAKULA SURYANARAYANA MURTHY·Filed 2012·Granted Apr 5, 2016·4 cites·17 claims
- 0454US12380023B2Providing adaptive cache bypass in processor-based devicesQUALCOMM INC·Filed 2022·Granted Aug 5, 2025·0 cites·15 claims
- 0549US2025370753A1Operating system scheduler enhancements for improving performance of multiple single threaded workloadsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0648US12462331B2Adaptive caches for power optimization of graphics processingQUALCOMM INC·Filed 2023·Granted Nov 4, 2025·0 cites·28 claims
- 0748US2025285208A1Memory aware register allocator for graphics processing unitsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 0847US2024320783A1Biasing cache replacement for optimized graphics processing unit (gpu) performanceQUALCOMM INC·Filed 2023·Application pending·0 cites
- 0942US2024176742A1Providing memory region prefetching in processor-based devicesQUALCOMM INC·Filed 2022·Application pending·0 cites
- 1041US2024095173A1Providing fairness-based allocation of caches in processor-based devicesQUALCOMM INC·Filed 2022·Application pending·0 cites
- 1128US10810142B2Adaptive scheduling of memory requestsXILINX INC·Filed 2017·Granted Oct 20, 2020·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →