Inventor · disambiguated record
Suryanarayan G. Hegde
Also filed as: HEGDE SURYANARAYAN G
19 granted patents·3 pending applications·518 citations·filing 1988–2007
96Inventor score
Files withIBM21
Top patents by PatentIndex Score
22 records- 0197US4931887ACapacitive measurement and control of the fly height of a recording sliderIBM·Filed 1988·Granted Jun 5, 1990·92 cites·41 claims
- 0292US7453123B2Self-aligned planar double-gate transistor structureIBM·Filed 2007·Granted Nov 18, 2008·15 cites·1 claims
- 0392US5392177ASealed DASD having humidity control and method of making sameIBM·Filed 1994·Granted Feb 21, 1995·58 cites·31 claims
- 0487US5977787ALarge area multiple-chip probe assembly and method of making the sameIBM·Filed 1997·Granted Nov 2, 1999·82 cites·31 claims
- 0586US7205185B2Self-aligned planar double-gate process by self-aligned oxidationIBM·Filed 2003·Granted Apr 17, 2007·26 cites·18 claims
- 0679US6833569B2Self-aligned planar double-gate process by amorphizationIBM·Filed 2002·Granted Dec 21, 2004·24 cites·17 claims
- 0777US6878978B2CMOS performance enhancement using localized voids and extended defectsIBM·Filed 2004·Granted Apr 12, 2005·15 cites·3 claims
- 0877US5875171AInterlocking disk stack that prevents disk slip in a storage diskIBM·Filed 1996·Granted Feb 23, 1999·33 cites·16 claims
- 0975US6803270B2CMOS performance enhancement using localized voids and extended defectsIBM·Filed 2003·Granted Oct 12, 2004·18 cites·12 claims
- 1073US5115664ATunable feedback transducer for transient friction measurementIBM·Filed 1990·Granted May 26, 1992·23 cites·10 claims
- 1172US6569781B1Method of forming an ultra-thin oxide layer on a silicon substrate by implantation of nitrogen through a sacrificial layer and subsequent annealing prior to oxide formationIBM·Filed 2002·Granted May 27, 2003·17 cites·18 claims
- 1272US6329704B1Ultra-shallow junction dopant layer having a peak concentration within a dielectric layerIBM·Filed 1999·Granted Dec 11, 2001·34 cites·7 claims
- 1371US6348388B1Process for fabricating a uniform gate oxide of a vertical transistorIBM·Filed 2000·Granted Feb 19, 2002·12 cites·11 claims
- 1466US6514843B2Method of enhanced oxidation of MOS transistor gate cornersIBM·Filed 2001·Granted Feb 4, 2003·10 cites·22 claims
- 1565US6297086B1Application of excimer laser anneal to DRAM processingIBM·Filed 1999·Granted Oct 2, 2001·21 cites·20 claims
- 1663US6727142B1Orientation independent oxidation of nitrided siliconIBM·Filed 2002·Granted Apr 27, 2004·8 cites·24 claims
- 1762US6150670AProcess for fabricating a uniform gate oxide of a vertical transistorIBM·Filed 1999·Granted Nov 21, 2000·22 cites·9 claims
- 1860US6387782B2Process of forming an ultra-shallow junction dopant layer having a peak concentration within a dielectric layerIBM·Filed 2001·Granted May 14, 2002·6 cites·15 claims
- 1948US6858488B2CMOS performance enhancement using localized voids and extended defectsIBM·Filed 2004·Granted Feb 22, 2005·2 cites·5 claims
- 2048US2005148134A1CMOS performance enhancement using localized voids and extended defectsFiled 2005·Application pending·0 cites
- 2136US2004051162A1Structure and method of providing reduced programming voltage antifuseIBM·Filed 2002·Application pending·0 cites
- 2236US2002197836A1Method of forming variable oxide thicknesses across semiconductor chipsIBM·Filed 2001·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Suryanarayan G. Hegde files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →