Inventor · disambiguated record
Subramoney Iyer
Also filed as: IYER SUBRAMONEY · IYER SUBRAMONEY V
7 granted patents·1 pending application·412 citations·filing 1995–2001
89Inventor score
Files withMOTOROLA INC7
Top patents by PatentIndex Score
8 records- 0192US5885856AIntegrated circuit having a dummy structure and method of makingMOTOROLA INC·Filed 1996·Granted Mar 23, 1999·160 cites·20 claims
- 0288US5665202AMulti-step planarization process using polishing at two different pad pressuresMOTOROLA INC·Filed 1995·Granted Sep 9, 1997·103 cites·20 claims
- 0372US5882243AMethod for polishing a semiconductor wafer using dynamic controlMOTOROLA INC·Filed 1997·Granted Mar 16, 1999·34 cites·10 claims
- 0471US6045435ALow selectivity chemical mechanical polishing (CMP) process for use on integrated circuit metal interconnectsMOTOROLA INC·Filed 1997·Granted Apr 4, 2000·44 cites·18 claims
- 0569US6001726AMethod for using a conductive tungsten nitride etch stop layer to form conductive interconnects and tungsten nitride contact structureMOTOROLA INC·Filed 1997·Granted Dec 14, 1999·46 cites·19 claims
- 0649US6012970AProcess for forming a semiconductor deviceMOTOROLA INC·Filed 1997·Granted Jan 11, 2000·14 cites·8 claims
- 0746US6146250AProcess for forming a semiconductor deviceMOTOROLA INC·Filed 1999·Granted Nov 14, 2000·11 cites·12 claims
- 0835US2002093101A1Method of metallization using a nickel-vanadium layerFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →