Inventor · disambiguated record
Subhash B. Kulkarni
Also filed as: KULKARNI SUBHASH B · KULKARNI SUBHASH BALAKRISHNA
14 granted patents·1 pending application·483 citations·filing 1983–2007
94Inventor score
Top patents by PatentIndex Score
15 records- 0195US5675185ASemiconductor structure incorporating thin film transistors with undoped cap oxide layersIBM·Filed 1995·Granted Oct 7, 1997·123 cites·24 claims
- 0290US6809005B2Method to fill deep trench structures with void-free polysilicon or siliconINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 26, 2004·51 cites·32 claims
- 0389US6022766ASemiconductor structure incorporating thin film transistors, and methods for its manufactureIBM·Filed 1997·Granted Feb 8, 2000·76 cites·2 claims
- 0483US6133610ASilicon-on-insulator chip having an isolation barrier for reliability and process of manufactureIBM·Filed 1998·Granted Oct 17, 2000·57 cites·18 claims
- 0578US5562770ASemiconductor manufacturing process for low dislocation defectsIBM·Filed 1994·Granted Oct 8, 1996·42 cites·16 claims
- 0677US5670812AField effect transistor having contact layer of transistor gate electrode materialIBM·Filed 1995·Granted Sep 23, 1997·42 cites·21 claims
- 0775US6563173B2Silicon-on-insulator chip having an isolation barrier for reliabilityIBM·Filed 2001·Granted May 13, 2003·17 cites·17 claims
- 0866US6492684B2Silicon-on-insulator chip having an isolation barrier for reliabilityIBM·Filed 2001·Granted Dec 10, 2002·11 cites·38 claims
- 0963US5744384ASemiconductor structures which incorporate thin film transistorsIBM·Filed 1996·Granted Apr 28, 1998·21 cites·7 claims
- 1059US5757050AField effect transistor having contact layer of transistor gate electrode materialIBM·Filed 1997·Granted May 26, 1998·18 cites·6 claims
- 1156US7144769B2Method to achieve increased trench depth, independent of CD as defined by lithographyIBM·Filed 2004·Granted Dec 5, 2006·4 cites·5 claims
- 1254US6281095B1Process of manufacturing silicon-on-insulator chip having an isolation barrier for reliabilityIBM·Filed 1998·Granted Aug 28, 2001·15 cites·10 claims
- 1347US6821864B2Method to achieve increased trench depth, independent of CD as defined by lithographyIBM·Filed 2002·Granted Nov 23, 2004·1 cites·8 claims
- 1443US2008190446A1Control of dry clean process in wafer processingRANADE RAJIV M·Filed 2007·Application pending·0 cites
- 1531US4504330AOptimum reduced pressure epitaxial growth process to prevent autodopingIBM·Filed 1983·Granted Mar 12, 1985·5 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →