Inventor · disambiguated record
Sung-Wei Lin
Also filed as: LIN SUNG-WEI
40 granted patents·4 pending applications·1,172 citations·filing 1988–2008
98Inventor score
Top patents by PatentIndex Score
44 records- 0196US5313432ASegmented, multiple-decoder memory array and method for programming a memory arrayTEXAS INSTRUMENTS INC·Filed 1991·Granted May 17, 1994·176 cites·30 claims
- 0291US7443708B2Low resistance plate line bus architectureTEXAS INSTRUMENTS INC·Filed 2006·Granted Oct 28, 2008·24 cites·45 claims
- 0388US4823318ADriving circuitry for EEPROM memory cellTEXAS INSTRUMENTS INC·Filed 1988·Granted Apr 18, 1989·55 cites·19 claims
- 0487US5060195AHot electron programmable, tunnel electron erasable contactless EEPROMTEXAS INSTRUMENTS INC·Filed 1990·Granted Oct 22, 1991·73 cites·16 claims
- 0587US5047981ABit and block erasing of an electrically erasable and programmable read-only memory arrayTEXAS INSTRUMENTS INC·Filed 1989·Granted Sep 10, 1991·54 cites·11 claims
- 0686US5491809ASmart erase algorithm with secure scheme for flash EPROMsTEXAS INSTRUMENTS INC·Filed 1993·Granted Feb 13, 1996·64 cites·5 claims
- 0786US5422590AHigh voltage negative charge pump with low voltage CMOS transistorsTEXAS INSTRUMENTS INC·Filed 1994·Granted Jun 6, 1995·49 cites·13 claims
- 0885US6751125B2Gate voltage reduction in a memory readFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Jun 15, 2004·37 cites·38 claims
- 0985US5168335AElectrically programmable, electrically erasable memory array cell with field plateTEXAS INSTRUMENTS INC·Filed 1991·Granted Dec 1, 1992·68 cites·8 claims
- 1083US7133304B2Method and apparatus to reduce storage node disturbance in ferroelectric memoryTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 7, 2006·32 cites·25 claims
- 1183US5265052AWordline driver circuit for EEPROM memory cellTEXAS INSTRUMENTS INC·Filed 1992·Granted Nov 23, 1993·51 cites·19 claims
- 1282US7630257B2Methods and systems for accessing memoryTEXAS INSTRUMENTS INC·Filed 2006·Granted Dec 8, 2009·13 cites·8 claims
- 1379US5396115ACurrent-sensing power-on reset circuit for integrated circuitsTEXAS INSTRUMENTS INC·Filed 1993·Granted Mar 7, 1995·34 cites·16 claims
- 1479US5335200AHigh voltage negative charge pump with low voltage CMOS transistorsTEXAS INSTRUMENTS INC·Filed 1993·Granted Aug 2, 1994·37 cites·2 claims
- 1578US5187683AMethod for programming EEPROM memory arraysTEXAS INSTRUMENTS INC·Filed 1990·Granted Feb 16, 1993·43 cites·24 claims
- 1677US5450417ACircuit for testing power-on-reset circuitryTEXAS INSTRUMENTS INC·Filed 1993·Granted Sep 12, 1995·31 cites·5 claims
- 1777US5177705AProgramming of an electrically-erasable, electrically-programmable, read-only memory arrayTEXAS INSTRUMENTS INC·Filed 1989·Granted Jan 5, 1993·32 cites·20 claims
- 1874US5010028AMethod of making hot electron programmable, tunnel electron erasable contactless EEPROMTEXAS INSTRUMENTS INC·Filed 1989·Granted Apr 23, 1991·31 cites·10 claims
- 1971US5636162AErase procedureTEXAS INSTRUMENTS INC·Filed 1996·Granted Jun 3, 1997·32 cites·21 claims
- 2068US6826103B2Auto-tuneable reference circuit for flash EEPROM productsFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Nov 30, 2004·17 cites·15 claims
- 2167US7301795B2Accelerated low power fatigue testing of FRAMTEXAS INSTRUMENTS INC·Filed 2005·Granted Nov 27, 2007·6 cites·42 claims
- 2267US5017980AElectrically-erasable, electrically-programmable read-only memory cellTEXAS INSTRUMENTS INC·Filed 1990·Granted May 21, 1991·27 cites·14 claims
- 2366US5523249AMethod of making an EEPROM cell with separate erasing and programming regionsTEXAS INSTRUMENTS INC·Filed 1994·Granted Jun 4, 1996·25 cites·3 claims
- 2466US5218568AElectrically-erasable, electrically-programmable read-only memory cell, an array of such cells and methods for making and using the sameTEXAS INSTRUMENTS INC·Filed 1991·Granted Jun 8, 1993·28 cites·4 claims
- 2560US5657268AArray-source line, bitline and wordline sequence in flash operationsTEXAS INSTRUMENTS INC·Filed 1995·Granted Aug 12, 1997·20 cites·12 claims
- 2658US5008721AElectrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnelTEXAS INSTRUMENTS INC·Filed 1990·Granted Apr 16, 1991·19 cites·22 claims
- 2751US7349237B2Plateline driver with RAMP rate controlTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 25, 2008·4 cites·14 claims
- 2850US5694073ATemperature and supply-voltage sensing circuitTEXAS INSTRUMENTS INC·Filed 1995·Granted Dec 2, 1997·12 cites·21 claims
- 2950US5397946AHigh-voltage sensor for integrated circuitsTEXAS INSTRUMENTS INC·Filed 1993·Granted Mar 14, 1995·14 cites·20 claims
- 3047US5392248ACircuit and method for detecting column-line shorts in integrated-circuit memoriesTEXAS INSTRUMENTS INC·Filed 1993·Granted Feb 21, 1995·12 cites·8 claims
- 3143US2008079471A1Plateline Driver with Ramp Rate ControlTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 3241US5156991AFabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlinesTEXAS INSTRUMENTS INC·Filed 1991·Granted Oct 20, 1992·8 cites·19 claims
- 3341US5155055AMethod of making an electrically-erasable, electrically-programmable read-only memory cell with self-aligned tunnelTEXAS INSTRUMENTS INC·Filed 1991·Granted Oct 13, 1992·8 cites·24 claims
- 3441US2009010038A1Low resistance plate line bus architectureTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 3540US7813198B2System and method for reading memoryTEXAS INSTRUMENTS INC·Filed 2008·Granted Oct 12, 2010·0 cites·21 claims
- 3639US5012307AElectrically-erasable, electrically-programmable read-only memoryTEXAS INSTRUMENTS INC·Filed 1990·Granted Apr 30, 1991·7 cites·10 claims
- 3738US5424992AMethod and device for detecting and controlling an array source signal discharge for a memory erase operationTEXAS INSTR INC A DELAWARE COR·Filed 1993·Granted Jun 13, 1995·8 cites·3 claims
- 3838US5334550AMethod of producing a self-aligned window at recessed intersection of insulating regionsTEXAS INSTRUMENTS INC·Filed 1993·Granted Aug 2, 1994·9 cites·9 claims
- 3937US7463504B2Active float for the dummy bit lines in FeRAMTEXAS INSTRUMENTS INC·Filed 2005·Granted Dec 9, 2008·0 cites·45 claims
- 4037US5668769AMemory device performance by delayed power-downTEXAS INSTRUMENTS INC·Filed 1995·Granted Sep 16, 1997·6 cites·5 claims
- 4136US5646894ASmart boost circuit for low voltage flash EPROMTEXAS INSTRUMENTS INC·Filed 1995·Granted Jul 8, 1997·5 cites·16 claims
- 4234US2007038805A1High granularity redundancy for ferroelectric memoriesTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 4330US5081055AMethod of making electrically-erasable, electrically-programmable read-only memory cell having a tunnel window insulator and forming implanted regions for isolation between wordlinesTEXAS INSTRUMENTS INC·Filed 1991·Granted Jan 14, 1992·1 cites·21 claims
- 4429US2004123181A1Self-repair of memory arrays using preallocated redundancy (PAR) architectureFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →