Inventor · disambiguated record

Sudeep Ashok Pomar

Also filed as: POMAR SUDEEP A · POMAR Sudeep Ashok

2 granted patents·31 citations·filing 2002–2016

54Inventor score

Technology areasG11C

Files withAVAGO TECHNOLOGIES GENERAL IP1 LSI LOGIC CORP1

Top patents by PatentIndex Score

2 records

0176US6498758B1Twisted bitlines to reduce coupling effects (dual port memories)LSI LOGIC CORP·Filed 2002·Granted Dec 24, 2002·31 cites·4 claims
0230US9799409B2Read-only memory (ROM) architecture with selective encodingAVAGO TECHNOLOGIES GENERAL IP·Filed 2016·Granted Oct 24, 2017·0 cites·22 claims

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →