Inventor · disambiguated record
Subramanian Ramesh
Also filed as: RAMESH SUBRAMANIAN
39 granted patents·4 pending applications·1,093 citations·filing 1987–2024
98Inventor score
Files withLSI LOGIC CORP17DATAGUISE INC12HEWLETT PACKARD DEVELOPMENT CO4LSI CORP3VENKATRAMAN RAMNATH3
Top patents by PatentIndex Score
43 records- 0198US8178909B2Integrated circuit cell architecture configurable for memory or logic elementsVENKATRAMAN RAMNATH·Filed 2011·Granted May 15, 2012·115 cites·6 claims
- 0298US8044437B1Integrated circuit cell architecture configurable for memory or logic elementsLSI LOGIC CORP·Filed 2005·Granted Oct 25, 2011·115 cites·12 claims
- 0397US7404154B1Basic cell architecture for structured application-specific integrated circuitsLSI CORP·Filed 2005·Granted Jul 22, 2008·130 cites·16 claims
- 0493US10878124B1Systems and methods for detecting sensitive information using pattern recognitionDATAGUISE INC·Filed 2018·Granted Dec 29, 2020·31 cites·20 claims
- 0592US9268947B1Method and system for managing information associated with sensitive information in an enterpriseDATAGUISE INC·Filed 2013·Granted Feb 23, 2016·70 cites·20 claims
- 0691US6980462B1Memory cell architecture for reduced routing congestionLSI LOGIC CORP·Filed 2003·Granted Dec 27, 2005·58 cites·36 claims
- 0789US7006370B1Memory cell architectureLSI LOGIC CORP·Filed 2003·Granted Feb 28, 2006·50 cites·30 claims
- 0885US9465954B1Method and system for tracking masking of dataDATAGUISE INC·Filed 2013·Granted Oct 11, 2016·19 cites·11 claims
- 0983US8429586B2Basic cell architecture for structured ASICsVENKATRAMAN RAMNATH·Filed 2012·Granted Apr 23, 2013·5 cites·5 claims
- 1083US6388586B1Method for reversing the bits of a computer data structureHEWLETT PACKARD CO·Filed 2001·Granted May 14, 2002·43 cites·12 claims
- 1183US6166403AIntegrated circuit having embedded memory with electromagnetic shieldLSI LOGIC CORP·Filed 1997·Granted Dec 26, 2000·72 cites·14 claims
- 1282US7440356B2Modular design of multiport memory bitcellsLSI CORP·Filed 2006·Granted Oct 21, 2008·13 cites·20 claims
- 1382US6778462B1Metal-programmable single-port SRAM array for dual-port functionalityLSI LOGIC CORP·Filed 2003·Granted Aug 17, 2004·38 cites·20 claims
- 1478US2025103571A1Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive typeDATAGUISE INC·Filed 2024·Application pending·0 cites
- 1575US11288246B1Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive typeDATAGUISE INC·Filed 2020·Granted Mar 29, 2022·1 cites·2 claims
- 1675US7114064B2System and method for accessing an advanced configuration and power interface (ACPI) namespace nodal treeHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 26, 2006·22 cites·33 claims
- 1775US5953614AProcess for forming self-aligned metal silicide contacts for MOS structure using single silicide-forming stepLSI LOGIC CORP·Filed 1997·Granted Sep 14, 1999·48 cites·23 claims
- 1874US12386790B2Method and system for managing and securing subsets of data in a large distributed data storeDATAGUISE INC·Filed 2023·Granted Aug 12, 2025·0 cites·9 claims
- 1974US12204514B2Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive typeDATAGUISE INC·Filed 2023·Granted Jan 21, 2025·0 cites·2 claims
- 2072US4795679AMonocrystalline silicon layers on substratesPHILIPS CORP·Filed 1987·Granted Jan 3, 1989·40 cites·19 claims
- 2169US7007160B1System and method for loading an advanced configuration and power interface (ACPI) original equipment manufacturer (OEM) description tableHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Feb 28, 2006·15 cites·23 claims
- 2268US11803519B2Method and system for managing and securing subsets of data in a large distributed data storeDATAGUISE INC·Filed 2021·Granted Oct 31, 2023·0 cites·6 claims
- 2368US11762824B2Ascribing a confidence factor for identifying a given column in a structured dataset belonging to a particular sensitive typeDATAGUISE INC·Filed 2022·Granted Sep 19, 2023·0 cites·2 claims
- 2468US6218276B1Silicide encapsulation of polysilicon gate and interconnectLSI LOGIC CORP·Filed 1997·Granted Apr 17, 2001·28 cites·26 claims
- 2567US6413848B1Self-aligned fuse structure and method with dual-thickness dielectricLSI LOGIC CORP·Filed 2000·Granted Jul 2, 2002·14 cites·9 claims
- 2666US6865614B2Method for transferring a packed data structure to an unpacked data structure by copying the packed data using pointerHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Mar 8, 2005·13 cites·9 claims
- 2764US4888302AMethod of reduced stress recrystallizationPHILIPS CORP·Filed 1989·Granted Dec 19, 1989·29 cites·9 claims
- 2863US6977512B2Method and apparatus for characterizing shared contacts in high-density SRAM cell designLSI LOGIC CORP·Filed 2003·Granted Dec 20, 2005·13 cites·18 claims
- 2962US6259146B1Self-aligned fuse structure and method with heat sinkLSI LOGIC CORP·Filed 1998·Granted Jul 10, 2001·26 cites·22 claims
- 3060US6963970B2System and method for executing a fast reset of a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Nov 8, 2005·7 cites·19 claims
- 3160US6061264ASelf-aligned fuse structure and method with anti-reflective coatingLSI LOGIC CORP·Filed 1998·Granted May 9, 2000·18 cites·16 claims
- 3259US7869251B2SRAM based one-time-programmable memoryLSI CORP·Filed 2008·Granted Jan 11, 2011·4 cites·18 claims
- 3359US6037233AMetal-encapsulated polysilicon gate and interconnectLSI LOGIC CORP·Filed 1998·Granted Mar 14, 2000·18 cites·13 claims
- 3458US6066525AMethod of forming DRAM capacitor by forming separate dielectric layers in a CMOS processLSI LOGIC CORP·Filed 1999·Granted May 23, 2000·15 cites·14 claims
- 3555US6978407B2Method and architecture for detecting random and systematic transistor degradation for transistor reliability evaluation in high-density memoryLSI LOGIC CORP·Filed 2003·Granted Dec 20, 2005·4 cites·16 claims
- 3653US6934174B2Reconfigurable memory arraysLSI LOGIC CORP·Filed 2003·Granted Aug 23, 2005·5 cites·26 claims
- 3752US11010348B2Method and system for managing and securing subsets of data in a large distributed data storeDATAGUISE INC·Filed 2014·Granted May 18, 2021·0 cites·15 claims
- 3848US7006369B2Design and use of a spacer cell to support reconfigurable memoriesLSI LOGIC CORP·Filed 2003·Granted Feb 28, 2006·7 cites·26 claims
- 3944US8166440B1Basic cell architecture for structured application-specific integrated circuitsVENKATRAMAN RAMNATH·Filed 2008·Granted Apr 24, 2012·0 cites·6 claims
- 4044US2015026462A1Method and system for access-controlled decryption in big data storesDATAGUISE INC·Filed 2014·Application pending·0 cites
- 4142US6162714AMethod of forming thin polygates for sub quarter micron CMOS processLSI LOGIC CORP·Filed 1997·Granted Dec 19, 2000·7 cites·8 claims
- 4241US2015026823A1Method and system for entitlement setting, mapping, and monitoring in big data storesDATAGUISE INC·Filed 2014·Application pending·0 cites
- 4339US2003014616A1Method and apparatus for pre-processing a data collection for use by a big-endian operating systemFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →