Inventor · disambiguated record
Swaroop Adusumilli
Also filed as: ADUSUMILLI SWAROOP
18 granted patents·714 citations·filing 1996–2016
96Inventor score
Files withVLSI TECHNOLOGY INC8KONINKL PHILIPS ELECTRONICS NV6MICROCHIP TECH INC2CORRENT CORP1PHILIPS SEMICONDUCTOR INC1
Top patents by PatentIndex Score
18 records- 0194US6418545B1System and method to reduce scan test pins on an integrated circuitKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Jul 9, 2002·114 cites·26 claims
- 0294US6385749B1Method and arrangement for controlling multiple test access port control modulesKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted May 7, 2002·127 cites·28 claims
- 0391US6311302B1Method and arrangement for hierarchical control of multiple test access port control modulesPHILIPS SEMICONDUCTOR INC·Filed 1999·Granted Oct 30, 2001·98 cites·20 claims
- 0489US10162788B2USB on the go (OTG) multi-hub endpoint reflector hubMICROCHIP TECH INC·Filed 2016·Granted Dec 25, 2018·9 cites·29 claims
- 0584US7072996B2System and method of transferring data between a processing engine and a plurality of bus types using an arbiterCORRENT CORP·Filed 2002·Granted Jul 4, 2006·46 cites·25 claims
- 0684US6334198B1Method and arrangement for controlling multiply-activated test access port control modulesKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Dec 25, 2001·56 cites·20 claims
- 0767US6289406B1Optimizing the performance of asynchronous bus bridges with dynamic transactionsVLSI TECHNOLOGY INC·Filed 1998·Granted Sep 11, 2001·49 cites·28 claims
- 0862US6412030B1System and method to optimize read performance while accepting write data in a PCI bus architectureKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Jun 25, 2002·40 cites·7 claims
- 0959US6438700B1System and method to reduce power consumption in advanced RISC machine (ARM) based systemsKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Aug 20, 2002·30 cites·12 claims
- 1059US5793992AMethod and apparatus for arbitrating access to main memory of a computer systemVLSI TECHNOLOGY INC·Filed 1996·Granted Aug 11, 1998·39 cites·23 claims
- 1159US5761454ADeadlock resolution methods and apparatus for interfacing concurrent and asynchronous busesVLSI TECHNOLOGY INC·Filed 1996·Granted Jun 2, 1998·37 cites·24 claims
- 1254US6543018B1System and method to facilitate flexible control of bus drivers during scan test operationsKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Apr 1, 2003·19 cites·8 claims
- 1346US5815675AMethod and apparatus for direct access to main memory by an I/O busVLSI TECHNOLOGY INC·Filed 1996·Granted Sep 29, 1998·22 cites·17 claims
- 1445US10042784B2Side channel access through USB streamsMICROCHIP TECH INC·Filed 2015·Granted Aug 7, 2018·0 cites·9 claims
- 1540US6301631B1Memory mapping method for eliminating dual address cycles in a peripheral component interconnect environmentVLSI TECHNOLOGY INC·Filed 1999·Granted Oct 9, 2001·12 cites·38 claims
- 1639US6230216B1Method for eliminating dual address cycles in a peripheral component interconnect environmentVLSI TECHNOLOGY INC·Filed 1999·Granted May 8, 2001·11 cites·20 claims
- 1732US6223232B1System and method to predict configuration of a bus targetVLSI TECHNOLOGY INC·Filed 1999·Granted Apr 24, 2001·3 cites·20 claims
- 1831US6178478B1Smart target mechanism for eliminating dual address cycles in a peripheral component interconnect environmentVLSI TECHNOLOGY INC·Filed 1998·Granted Jan 23, 2001·2 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →