Inventor · disambiguated record
Tarak A. Railkar
Also filed as: RAILKAR TARAK · RAILKAR TARAK A
31 granted patents·2 pending applications·224 citations·filing 2000–2024
96Inventor score
Files withQORVO US INC16TRIQUINT SEMICONDUCTOR INC5RAILKAR TARAK A4MAXIM INTEGRATED PRODUCTS2CATE STEVEN D1
Top patents by PatentIndex Score
33 records- 0196US8921995B1Integrated circuit package including a three-dimensional fan-out/fan-in signal routingRAILKAR TARAK A·Filed 2011·Granted Dec 30, 2014·42 cites·16 claims
- 0295US7982305B1Integrated circuit package including a three-dimensional fan-out / fan-in signal routingMAXIM INTEGRATED PRODUCTS·Filed 2008·Granted Jul 19, 2011·47 cites·24 claims
- 0394US11626340B2Integrated circuit (IC) package with embedded heat spreader in a redistribution layer (RDL)QORVO US INC·Filed 2019·Granted Apr 11, 2023·9 cites·22 claims
- 0490US8946904B2Substrate vias for heat removal from semiconductor dieRAILKAR TARAK A·Filed 2010·Granted Feb 3, 2015·16 cites·27 claims
- 0590US8908383B1Thermal via structures with surface featuresRAILKAR TARAK A·Filed 2012·Granted Dec 9, 2014·16 cites·19 claims
- 0686US9589864B2Substrate with embedded sintered heat spreader and process for making the sameRF MICRO DEVICES INC·Filed 2015·Granted Mar 7, 2017·5 cites·20 claims
- 0786US8946894B2Package for high-power semiconductor devicesTRIQUINT SEMICONDUCTOR INC·Filed 2013·Granted Feb 3, 2015·6 cites·8 claims
- 0885US9793237B2Hollow-cavity flip-chip package with reinforced interconnects and process for making the sameTRIQUINT SEMICONDUCTOR INC·Filed 2016·Granted Oct 17, 2017·5 cites·16 claims
- 0985US9659898B1Apparatuses, systems, and methods for die attach coatings for semiconductor packagesTRIQUINT SEMICONDUCTOR INC·Filed 2015·Granted May 23, 2017·6 cites·19 claims
- 1084US9974158B2Air-cavity package with two heat dissipation interfacesQORVO US INC·Filed 2017·Granted May 15, 2018·5 cites·21 claims
- 1184US7112545B1Passivation of material using ultra-fast pulsed laserUNIV ARKANSAS·Filed 2000·Granted Sep 26, 2006·30 cites·15 claims
- 1279US10390434B2Laminate-based package with internal overmoldQORVO US INC·Filed 2018·Granted Aug 20, 2019·3 cites·20 claims
- 1379US8314472B2Semiconductor structure comprising pillarPARKHURST RAY·Filed 2010·Granted Nov 20, 2012·8 cites·20 claims
- 1478US12327679B2Process for making laminate substrate with sintered componentsQORVO US INC·Filed 2023·Granted Jun 10, 2025·0 cites·20 claims
- 1578US10096536B1Graphene heat dissipating structureNAT TECH & ENG SOLUTIONS SANDIA LLC·Filed 2017·Granted Oct 9, 2018·2 cites·8 claims
- 1678US8018051B2Thermally enhanced semiconductor packageMAXIM INTEGRATED PRODUCTS·Filed 2009·Granted Sep 13, 2011·7 cites·9 claims
- 1777US8304293B2Thermally enhanced semiconductor packageRAILKAR TARAK A·Filed 2011·Granted Nov 6, 2012·4 cites·3 claims
- 1876US9721867B1Graphene heat dissipating structureSANDIA CORP·Filed 2015·Granted Aug 1, 2017·2 cites·10 claims
- 1975US10906274B2Laminate substrate with sintered componentsQORVO US INC·Filed 2019·Granted Feb 2, 2021·0 cites·22 claims
- 2075US9991181B2Air-cavity package with enhanced package integration level and thermal performanceQORVO US INC·Filed 2017·Granted Jun 5, 2018·2 cites·21 claims
- 2174US11929300B2Method for packaging an integrated circuit (IC) package with embedded heat spreader in a redistribution layer (RDL)QORVO US INC·Filed 2023·Granted Mar 12, 2024·0 cites·18 claims
- 2272US11551995B2Substrate with embedded active thermoelectric coolerQORVO US INC·Filed 2018·Granted Jan 10, 2023·2 cites·24 claims
- 2369US10587029B2Multi-layer substrate with integrated resonatorQORVO US INC·Filed 2018·Granted Mar 10, 2020·2 cites·22 claims
- 2468US9799637B2Semiconductor package with lid having lid conductive structureQORVO US INC·Filed 2016·Granted Oct 24, 2017·2 cites·19 claims
- 2564US10177064B2Air cavity packageQORVO US INC·Filed 2016·Granted Jan 8, 2019·1 cites·23 claims
- 2661US11783998B2Process for making laminate substrate with sintered componentsQORVO US INC·Filed 2019·Granted Oct 10, 2023·0 cites·14 claims
- 2760US2025015053A1Bare flip-chip die stack and the fabrication method and tooling thereofQORVO US INC·Filed 2024·Application pending·0 cites
- 2858US9559034B2Package for high-power semiconductor devicesTRIQUINT SEMICONDUCTOR INC·Filed 2014·Granted Jan 31, 2017·0 cites·14 claims
- 2955US8097963B1Electrically conductive matrix for z-axis interconnectCATE STEVEN D·Filed 2009·Granted Jan 17, 2012·2 cites·23 claims
- 3052US2023178486A1Backside metallization for semiconductor assemblyQORVO US INC·Filed 2022·Application pending·0 cites
- 3150US10217686B2Air-cavity package with enhanced package integration level and thermal performanceQORVO US INC·Filed 2018·Granted Feb 26, 2019·0 cites·17 claims
- 3248US9585240B2Advanced grounding schemeTRIQUINT SEMICONDUCTOR INC·Filed 2013·Granted Feb 28, 2017·0 cites·19 claims
- 3342US10141245B2High-power acoustic device with improved performanceQORVO US INC·Filed 2017·Granted Nov 27, 2018·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →