Inventor · disambiguated record
Ta-Ching Yu
Also filed as: YU TA-CHING
13 granted patents·34 citations·filing 2015–2024
88Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD13
Top patents by PatentIndex Score
13 records- 0196US9418868B1Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 16, 2016·11 cites·20 claims
- 0294US10049918B2Directional patterning methodsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Aug 14, 2018·9 cites·20 claims
- 0391US9659821B1Method of forming interconnect structures by self-aligned approachTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted May 23, 2017·8 cites·20 claims
- 0487US12394633B2Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Aug 19, 2025·0 cites·20 claims
- 0587US10163654B2Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 25, 2018·3 cites·8 claims
- 0679US11894238B2Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Feb 6, 2024·0 cites·20 claims
- 0775US9412649B1Method of fabricating semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 9, 2016·2 cites·20 claims
- 0873US11387113B2Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 12, 2022·0 cites·20 claims
- 0969US10795270B2Methods of defect inspectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Oct 6, 2020·1 cites·19 claims
- 1064US10818509B2Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Oct 27, 2020·0 cites·20 claims
- 1161US11624985B2Methods of defect inspectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 11, 2023·0 cites·20 claims
- 1258US10276377B2Method for patterning interconnectsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 30, 2019·0 cites·20 claims
- 1350US9824922B1Method of forming interconnect structures by self-aligned approachTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Nov 21, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →