Inventor · disambiguated record
Tetse Jang
Also filed as: JANG TETSE
14 granted patents·164 citations·filing 2003–2010
92Inventor score
Top patents by PatentIndex Score
14 records- 0193US7129747B1CPLD with fast logic sharing between function blocksXILINX INC·Filed 2004·Granted Oct 31, 2006·58 cites·18 claims
- 0284US7620929B1Programmable logic device having a programmable selector circuitXILINX INC·Filed 2008·Granted Nov 17, 2009·12 cites·9 claims
- 0383US8302041B1Implementation flow for electronic circuit designs using choice networksCHAN VI CHI·Filed 2008·Granted Oct 30, 2012·23 cites·20 claims
- 0481US7814452B1Function symmetry-based optimization for physical synthesis of programmable integrated circuitsXILINX INC·Filed 2007·Granted Oct 12, 2010·10 cites·13 claims
- 0580US8201125B1Network mapping using edges as a parameterJANG TETSE·Filed 2009·Granted Jun 12, 2012·13 cites·12 claims
- 0680US7610573B1Implementation of alternate solutions in technology mapping and placementXILINX INC·Filed 2007·Granted Oct 27, 2009·11 cites·12 claims
- 0777US7345508B1Programmable logic device having a programmable selector circuitXILINX INC·Filed 2006·Granted Mar 18, 2008·8 cites·16 claims
- 0875US7603646B1Method and apparatus for power optimization using don't care conditions of configuration bits in lookup tablesXILINX INC·Filed 2007·Granted Oct 13, 2009·7 cites·20 claims
- 0970US7725855B1Symmetry-based optimization for the physical synthesis of programmable logic devicesXILINX INC·Filed 2007·Granted May 25, 2010·5 cites·20 claims
- 1067US7071732B1Scalable complex programmable logic device with segmented interconnect resourcesXILINX INC·Filed 2003·Granted Jul 4, 2006·12 cites·21 claims
- 1151US8145923B2Circuit for and method of minimizing power consumption in an integrated circuit deviceLAKKAPRAGADA SHANKAR·Filed 2008·Granted Mar 27, 2012·3 cites·20 claims
- 1247US7904842B1Modifying a logic implementation by swapping inputs of fanout-free conesXILINX INC·Filed 2008·Granted Mar 8, 2011·0 cites·19 claims
- 1345US8667435B1Function symmetry-based optimization for physical synthesis of programmable integrated circuitsJANG TETSE·Filed 2010·Granted Mar 4, 2014·0 cites·12 claims
- 1441US6989690B1Methods of implementing scalable routing matrices for programmable logic devicesXILINX INC·Filed 2004·Granted Jan 24, 2006·2 cites·38 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →