Inventor · disambiguated record
Te-Li Lau
Also filed as: LAU TE-LI
43 granted patents·2,131 citations·filing 1991–2008
99Inventor score
Top patents by PatentIndex Score
43 records- 0196US6611908B2Microprocessor architecture capable of supporting multiple heterogeneous processorsSEIKO EPSON CORP·Filed 2001·Granted Aug 26, 2003·83 cites·12 claims
- 0296US5440752AMicroprocessor architecture with a switch network for data transfer between cache, memory port, and IOUSEIKO EPSON CORP·Filed 1991·Granted Aug 8, 1995·170 cites·35 claims
- 0395US7739482B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2006·Granted Jun 15, 2010·26 cites·18 claims
- 0495US5560032AHigh-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1995·Granted Sep 24, 1996·193 cites·29 claims
- 0595US5539911AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1992·Granted Jul 23, 1996·133 cites·56 claims
- 0692US6647485B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2001·Granted Nov 11, 2003·42 cites·40 claims
- 0792US6272579B1Microprocessor architecture capable of supporting multiple heterogeneous processorsSEIKO EPSON CORP·Filed 1999·Granted Aug 7, 2001·120 cites·8 claims
- 0891US5689720AHigh-performance superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1996·Granted Nov 18, 1997·90 cites·11 claims
- 0990US6965987B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2003·Granted Nov 15, 2005·43 cites·58 claims
- 1089US6986024B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Jan 10, 2006·28 cites·24 claims
- 1188US6954844B2Microprocessor architecture capable of supporting multiple heterogeneous processorsSEIKO EPSON CORP·Filed 2003·Granted Oct 11, 2005·29 cites·23 claims
- 1288US6915412B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Jul 5, 2005·25 cites·26 claims
- 1388US5768445ACompression and decompression scheme performed on shared workstation memory by media coprocessorSILICON GRAPHICS INC·Filed 1996·Granted Jun 16, 1998·140 cites·15 claims
- 1488US5754800AMulti processor system having dynamic priority based on row match of previously serviced address, number of times denied service and number of times serviced without interruptionSEIKO EPSON CORP·Filed 1995·Granted May 19, 1998·86 cites·6 claims
- 1587US7657712B2Microprocessor architecture capable of supporting multiple heterogeneous processorsSEIKO EPSON CORP·Filed 2005·Granted Feb 2, 2010·10 cites·12 claims
- 1687US6948052B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Sep 20, 2005·23 cites·39 claims
- 1787US5961629AHigh performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1998·Granted Oct 5, 1999·135 cites·27 claims
- 1886US7721070B2High-performance, superscalar-based computer system with out-of-order instruction executionNGUYEN LE TRONG·Filed 2008·Granted May 18, 2010·10 cites·21 claims
- 1986US7162610B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Jan 9, 2007·21 cites·35 claims
- 2085US6959375B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2002·Granted Oct 25, 2005·19 cites·10 claims
- 2184US6934829B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Aug 23, 2005·17 cites·21 claims
- 2281US6219763B1System and method for adjusting priorities associated with multiple devices seeking access to a memory array unitSEIKO EPSON CORP·Filed 1999·Granted Apr 17, 2001·55 cites·4 claims
- 2380US7555632B2High-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2005·Granted Jun 30, 2009·6 cites·23 claims
- 2480US6941447B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Sep 6, 2005·13 cites·23 claims
- 2580US6128723AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Oct 3, 2000·42 cites·27 claims
- 2679US7941635B2High-performance superscalar-based computer system with out-of order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2006·Granted May 10, 2011·5 cites·5 claims
- 2779US7028161B2High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 2001·Granted Apr 11, 2006·17 cites·39 claims
- 2879US6038654AHigh performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Mar 14, 2000·39 cites·80 claims
- 2979US5604865AMicroprocessor architecture with a switch network for data transfer between cache, memory port, and IOUSEIKO EPSON CORP·Filed 1995·Granted Feb 18, 1997·50 cites·20 claims
- 3078US8019975B2System and method for handling load and/or store operations in a superscalar microprocessorSEIKO EPSON CORP·Filed 2005·Granted Sep 13, 2011·5 cites·59 claims
- 3177US6092181AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1997·Granted Jul 18, 2000·37 cites·62 claims
- 3276US6272619B1High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Aug 7, 2001·34 cites·80 claims
- 3376US6256720B1High performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Jul 3, 2001·34 cites·80 claims
- 3476US5394515APage printer controller including a single chip superscalar microprocessor with graphics functional unitsSEIKO EPSON CORP·Filed 1994·Granted Feb 28, 1995·57 cites·12 claims
- 3575US6101594AHigh-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 1999·Granted Aug 8, 2000·31 cites·31 claims
- 3675US5941979AMicroprocessor architecture with a switch network and an arbitration unit for controlling access to memory portsSEIKO EPSON CORP·Filed 1997·Granted Aug 24, 1999·40 cites·6 claims
- 3774US6282630B1High-performance, superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1999·Granted Aug 28, 2001·41 cites·44 claims
- 3873US6038653AHigh-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1998·Granted Mar 14, 2000·39 cites·33 claims
- 3971US5832292AHigh-performance superscalar-based computer system with out-of-order instruction execution and concurrent results distributionSEIKO EPSON CORP·Filed 1996·Granted Nov 3, 1998·38 cites·20 claims
- 4070US7487333B2High-performance, superscalar-based computer system with out-of-order instruction executionSEIKO EPSON CORP·Filed 2003·Granted Feb 3, 2009·6 cites·59 claims
- 4169US5261106ASemaphore bypassSEIKO EPSON CORP·Filed 1991·Granted Nov 9, 1993·31 cites·30 claims
- 4265US5564117AComputer system including a page printer controller including a single chip supercalar microprocessor with graphical functional unitsSEIKO EPSON CORP·Filed 1995·Granted Oct 8, 1996·39 cites·14 claims
- 4359US5559951APage printer controller including a single chip superscalar microprocessor with graphics functional unitsSEIKO EPSON CORP·Filed 1995·Granted Sep 24, 1996·29 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →