Inventor · disambiguated record
Tejvansh Singh Soni
Also filed as: SONI TEJVANSH S · SONI TEJVANSH SINGH
3 granted patents·36 citations·filing 2000–2006
69Inventor score
Top patents by PatentIndex Score
3 records- 0184US7526666B1Derived clock synchronization for reduced skew and jitterNVIDIA CORP·Filed 2006·Granted Apr 28, 2009·24 cites·20 claims
- 0256US6388471B1Single phase edge trigger registerSANDCRAFT INC·Filed 2000·Granted May 14, 2002·9 cites·31 claims
- 0341US6686774B1System and method for a high speed, bi-directional, zero turnaround time, pseudo differential bus capable of supporting arbitrary number of drivers and receiversRAZA MICROELECTRONICS INC·Filed 2001·Granted Feb 3, 2004·3 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →