Inventor · disambiguated record
Theodore J. Bohizic
Also filed as: BOHIZIC THEODORE J · BOHIZIC THEODORE JOSEPH
23 granted patents·2 pending applications·253 citations·filing 1999–2013
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
25 records- 0193US7877742B2Method, system, and computer program product to generate test instruction streams while guaranteeing loop terminationIBM·Filed 2006·Granted Jan 25, 2011·34 cites·20 claims
- 0292US7356436B2Method, system, and storage medium for estimating and improving test case generationIBM·Filed 2005·Granted Apr 8, 2008·24 cites·14 claims
- 0391US8428930B2Page mapped spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted Apr 23, 2013·26 cites·7 claims
- 0491US8099274B2Facilitating input/output processing of one or more guest processing systemsBOHIZIC THEODORE J·Filed 2007·Granted Jan 17, 2012·47 cites·32 claims
- 0589US9158566B2Page mapped spatially aware emulation of computer instruction setIBM·Filed 2012·Granted Oct 13, 2015·12 cites·14 claims
- 0689US8301434B2Host cell spatially aware emulation of a guest wild branchBOHIZIC THEODORE J·Filed 2009·Granted Oct 30, 2012·23 cites·22 claims
- 0781US8768683B2Self initialized host cell spatially aware emulation of a computer instruction setIBM·Filed 2013·Granted Jul 1, 2014·5 cites·15 claims
- 0879US7757129B2Generalized trace and log facility for first error data collectionIBM·Filed 2007·Granted Jul 13, 2010·12 cites·29 claims
- 0977US8447583B2Self initialized host cell spatially aware emulation of a computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted May 21, 2013·7 cites·6 claims
- 1075US7904270B2System for estimating and improving test case generationIBM·Filed 2008·Granted Mar 8, 2011·5 cites·4 claims
- 1173US7783867B2Controlling instruction execution in a processing environmentIBM·Filed 2007·Granted Aug 24, 2010·6 cites·20 claims
- 1273US6922658B2Method and system for testing the validity of shared data in a multiprocessing systemIBM·Filed 2003·Granted Jul 26, 2005·20 cites·32 claims
- 1371US8875114B2Employing identifiers provided by an operating system of a processing environment to optimize the processing environmentBOHIZIC THEODORE J·Filed 2007·Granted Oct 28, 2014·6 cites·19 claims
- 1471US8438340B2Executing atomic store disjoint instructionsBOHIZIC THEODORE J·Filed 2010·Granted May 7, 2013·3 cites·5 claims
- 1565US7743234B2Facilitating communication within an emulated processing environmentIBM·Filed 2007·Granted Jun 22, 2010·4 cites·23 claims
- 1662US7827451B2Method, system and program product for establishing decimal floating point operands for facilitating testing of decimal floating point instructionsIBM·Filed 2006·Granted Nov 2, 2010·2 cites·20 claims
- 1761US8364461B2Reusing invalidated traces in a system emulatorIBM·Filed 2009·Granted Jan 29, 2013·2 cites·15 claims
- 1861US7917326B2Storage medium for estimating and improving test case generationIBM·Filed 2008·Granted Mar 29, 2011·1 cites·4 claims
- 1958US7685381B2Employing a data structure of readily accessible units of memory to facilitate memory accessIBM·Filed 2007·Granted Mar 23, 2010·1 cites·26 claims
- 2050US8949106B2Just in time compiler in spatially aware emulation of a guest computer instruction setBOHIZIC THEODORE J·Filed 2009·Granted Feb 3, 2015·0 cites·18 claims
- 2146US7899663B2Providing memory consistency in an emulated processing environmentIBM·Filed 2007·Granted Mar 1, 2011·0 cites·19 claims
- 2245US7882336B2Employing a buffer to facilitate instruction executionIBM·Filed 2007·Granted Feb 1, 2011·0 cites·20 claims
- 2344US2004003210A1Method, system, and computer program product to generate test instruction streams while guaranteeing loop terminationIBM·Filed 2002·Application pending·0 cites
- 2441US6357020B1Method and system for low level testing of central electronics complex hardware using Test nano KernelIBM·Filed 1999·Granted Mar 12, 2002·13 cites·21 claims
- 2540US2003188044A1System and method for verifying superscalar computer architecturesIBM·Filed 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →