Inventor · disambiguated record
Thomas Daniel
Also filed as: DANIEL THOMAS · DANIEL THOMAS M · DANIEL THOMAS MARTIN
21 granted patents·3 pending applications·1,142 citations·filing 1976–2023
97Inventor score
Top patents by PatentIndex Score
24 records- 0196US8213634B1Modular and scalable directional audio array with novel filteringDANIEL THOMAS MARTIN·Filed 2010·Granted Jul 3, 2012·103 cites·10 claims
- 0292US5831980AShared memory fabric architecture for very high speed ATM switchesLSI LOGIC CORP·Filed 1996·Granted Nov 3, 1998·255 cites·15 claims
- 0383US6373846B1Single chip networking device with enhanced memory access co-processorLSI LOGIC CORP·Filed 1998·Granted Apr 16, 2002·73 cites·12 claims
- 0481US5920561AATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Jul 6, 1999·69 cites·13 claims
- 0578US4123427AMethod for the purification of mycobacterial protein antigens and resulting productDANIEL THOMAS M·Filed 1976·Granted Oct 31, 1978·28 cites·26 claims
- 0677US5848068AATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Dec 8, 1998·52 cites·18 claims
- 0777US5621773AMethod and apparatus for fast synchronization of T1 extended superframesLSI LOGIC CORP·Filed 1996·Granted Apr 15, 1997·50 cites·26 claims
- 0876US5046190APipeline image processorALLEN BRADLEY CO·Filed 1988·Granted Sep 3, 1991·61 cites·14 claims
- 0971US5982749AATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Nov 9, 1999·77 cites·6 claims
- 1069US5726985AATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Mar 10, 1998·68 cites·19 claims
- 1168US5959993AScheduler design for ATM switches, and its implementation in a distributed shared memory architectureLSI LOGIC CORP·Filed 1996·Granted Sep 28, 1999·63 cites·21 claims
- 1266US6493773B1Data validity measure for efficient implementation of first-in-first-out memories for multi-processor systemsLSI LOGIC CORP·Filed 2000·Granted Dec 10, 2002·10 cites·7 claims
- 1366US6115761AFirst-In-First-Out (FIFO) memories having dual descriptors and credit passing for efficient access in a multi-processor system environmentLSI LOGIC CORP·Filed 1997·Granted Sep 5, 2000·43 cites·12 claims
- 1466US5841772AATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Nov 24, 1998·30 cites·20 claims
- 1565US8234139B2Process manufacturing with least cost formulationWAN ELAINE·Filed 2007·Granted Jul 31, 2012·7 cites·13 claims
- 1661US6535512B1ATM communication system interconnect/termination unitLSI LOGIC CORP·Filed 1996·Granted Mar 18, 2003·46 cites·22 claims
- 1761US5987258ARegister reservation method for fast context switching in microprocessorsLSI LOGIC CORP·Filed 1997·Granted Nov 16, 1999·38 cites·19 claims
- 1860US6615296B2Efficient implementation of first-in-first-out memories for multi-processor systemsLSI LOGIC CORP·Filed 2001·Granted Sep 2, 2003·7 cites·12 claims
- 1955US2025117505A1Owner-managed password based file accessBANK OF AMERICA·Filed 2023·Application pending·0 cites
- 2054US9767499B2Supply chain orchestration system with configure-to-order item matchingORACLE INT CORP·Filed 2013·Granted Sep 19, 2017·0 cites·21 claims
- 2154US2014095249A1Supply chain orchestration system with orchestration, change management and internal material transfer flowORACLE INT CORP·Filed 2013·Application pending·0 cites
- 2247US4963128AChest tube and catheter grid for intrathoracic afterload radiotherapyUNIV VIRGINIA·Filed 1989·Granted Oct 16, 1990·56 cites·9 claims
- 2346US2009187265A1Process manufacturing with product quantity calculationORACLE INT CORP·Filed 2008·Application pending·0 cites
- 2442US4899021ALatching switchDANIEL THOMAS M·Filed 1988·Granted Feb 6, 1990·6 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →