Inventor · disambiguated record
Thierry Poiroux
Also filed as: POIROUX THIERRY
21 granted patents·1 pending application·87 citations·filing 2003–2017
93Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE9VINET MAUD4MORAND YVES2NEMOUCHI FABRICE2GABRIEL JEAN-CHRISTOPHE1
Top patents by PatentIndex Score
22 records- 0193US8349667B2Method for stabilizing germanium nanowires obtained by condensationCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2010·Granted Jan 8, 2013·25 cites·10 claims
- 0289US8656584B2Method of fabricating an electromechanical component using grapheneGABRIEL JEAN-CHRISTOPHE·Filed 2010·Granted Feb 25, 2014·14 cites·13 claims
- 0388US7829916B2Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2006·Granted Nov 9, 2010·15 cites·18 claims
- 0479US8399316B2Method for making asymmetric double-gate transistorsVINET MAUD·Filed 2007·Granted Mar 19, 2013·6 cites·15 claims
- 0572US8664104B2Method of producing a device with transistors strained by means of an external layerNEMOUCHI FABRICE·Filed 2012·Granted Mar 4, 2014·4 cites·14 claims
- 0672US7968945B2Microelectronic device provided with transistors coated with a piezoelectric layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2006·Granted Jun 28, 2011·7 cites·15 claims
- 0770US10914703B2Computer implemented method for determining intrinsic parameter in a stacked nanowires MOSFETCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 9, 2021·2 cites·14 claims
- 0866US7361592B2Method for producing a component comprising at least one germanium-based element and component obtained by such a methodCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2006·Granted Apr 22, 2008·3 cites·10 claims
- 0963US8021986B2Method for producing a transistor with metallic source and drainCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2010·Granted Sep 20, 2011·2 cites·14 claims
- 1060US8105906B2Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrateVINET MAUD·Filed 2007·Granted Jan 31, 2012·1 cites·17 claims
- 1159US9235668B1Computer implemented method for calculating a charge density at a gate interface of a double gate transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2014·Granted Jan 12, 2016·1 cites·19 claims
- 1256US8866225B2Field effect transistor with alternate electrical contactsMAYER FREDERIC·Filed 2008·Granted Oct 21, 2014·1 cites·14 claims
- 1355US6779161B1Process and device for evaluating a CMOS logical cellST MICROELECTRONICS SA·Filed 2003·Granted Aug 17, 2004·5 cites·29 claims
- 1454US9093552B2Manufacturing method for a device with transistors strained by silicidation of source and drain zonesNEMOUCHI FABRICE·Filed 2012·Granted Jul 28, 2015·1 cites·12 claims
- 1551US8324057B2Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrateVINET MAUD·Filed 2007·Granted Dec 4, 2012·0 cites·16 claims
- 1651US8232168B2Method for making asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrateVINET MAUD·Filed 2007·Granted Jul 31, 2012·0 cites·16 claims
- 1744US8021934B2Method for making a transistor with metallic source and drainCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2009·Granted Sep 20, 2011·0 cites·7 claims
- 1843US7473588B2Method for insulating patterns formed in a thin film of oxidizable semi-conducting materialCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2005·Granted Jan 6, 2009·0 cites·17 claims
- 1939US8598038B2Process for producing two interleaved patterns on a substrateMORAND YVES·Filed 2011·Granted Dec 3, 2013·0 cites·17 claims
- 2037US8530292B2Method for manufacturing a strained channel MOS transistorMORAND YVES·Filed 2011·Granted Sep 10, 2013·0 cites·17 claims
- 2135US8877622B2Process for producing an integrated circuitPOIROUX THIERRY·Filed 2011·Granted Nov 4, 2014·0 cites·12 claims
- 2234US2018097014A1Fdsoi-type field-effect transistorsST MICROELECTRONICS CROLLES 2 SAS·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →