Inventor · disambiguated record
Timothy C. Fischer
Also filed as: FISCHER TIMOTHY · FISCHER TIMOTHY C · FISCHER TIMOTHY CHARLES
18 granted patents·4 pending applications·289 citations·filing 1995–2022
95Inventor score
Files withHEWLETT PACKARD DEVELOPMENT CO10DIGITAL EQUIPMENT CORP4COMPAQ COMPUTER CORP2FISCHER TIMOTHY C1FISCHER TIMOTHY CHARLES1
Top patents by PatentIndex Score
22 records- 0189US7401245B2Count calibration for synchronous data transfer between clock domainsHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Jul 15, 2008·24 cites·17 claims
- 0275US6098166ASpeculative issue of instructions under a load miss shadowCOMPAQ COMPUTER CORP·Filed 1998·Granted Aug 1, 2000·73 cites·18 claims
- 0369US7477712B2Adaptable data path for synchronous data transfer between clock domainsHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Jan 13, 2009·4 cites·19 claims
- 0462US6658505B2System and method for checking bits in a buffer with multiple entriesHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Dec 2, 2003·9 cites·20 claims
- 0562US6542987B1Method and circuits for early detection of a full queueHEWLETT PACKARD DEVELOPMENT CO·Filed 1999·Granted Apr 1, 2003·31 cites·43 claims
- 0661US7076679B2System and method for synchronizing multiple variable-frequency clock generatorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Jul 11, 2006·8 cites·20 claims
- 0760US5694350ARounding adder for floating point processorDIGITAL EQUIPMENT CORP·Filed 1995·Granted Dec 2, 1997·39 cites·7 claims
- 0858US5627773AFloating point unit data path alignmentDIGITAL EQUIPMENT CORP·Filed 1995·Granted May 6, 1997·34 cites·8 claims
- 0957US7558317B2Edge calibration for synchronous data transfer between clock domainsHEWLETT PACKARD DEVELOPMENT CO·Filed 2005·Granted Jul 7, 2009·1 cites·28 claims
- 1057US6631506B1Method and apparatus for identifying switching race conditions in a circuit designHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Oct 7, 2003·6 cites·25 claims
- 1155US8006115B2Central processing unit with multiple clock zones and operating methodHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 23, 2011·4 cites·19 claims
- 1248US2005038979A1Method and circuits for early detection of a full queueFiled 2004·Application pending·0 cites
- 1347US8090930B2Method and circuits for early detection of a full queueFISCHER TIMOTHY CHARLES·Filed 2003·Granted Jan 3, 2012·2 cites·21 claims
- 1446US2004098566A1Method and apparatus for compacting a queueFiled 2003·Application pending·0 cites
- 1545US6122728ATechnique for ordering internal processor register accessesCOMPAQ COMPUTER CORP·Filed 1998·Granted Sep 19, 2000·19 cites·21 claims
- 1643US6704856B1Method for compacting an instruction queueHEWLETT PACKARD DEVELOPMENT CO·Filed 1999·Granted Mar 9, 2004·14 cites·2 claims
- 1738US6791906B1Method and system for fail-safe control of a frequency synthesizerHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Sep 14, 2004·1 cites·12 claims
- 1835US6101516ANormalization shift prediction independent of operand subtractionDIGITAL EQUIPMENT CORP·Filed 1998·Granted Aug 8, 2000·7 cites·6 claims
- 1935US2007063738A1CMOS logic circuitryFISCHER TIMOTHY C·Filed 2005·Application pending·0 cites
- 2034US5867407ANormalization shift prediction independent of operand substractionDIGITAL EQUIPMENT CORP·Filed 1997·Granted Feb 2, 1999·6 cites·21 claims
- 2134US2025139051A1Globals blocks in replicated block arraysTESLA INC·Filed 2022·Application pending·0 cites
- 2231US5742537AFast determination of floating point sticky bit from input operandsFiled 1997·Granted Apr 21, 1998·7 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →